Advanced Chipset Features; Dram Timing Selectable - DFI NB32-SC User Manual

Dfi rev.a+ system board user's manual
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3.1.3 Advanced Chipset Features

DRAM Timing Selectable

CAS Latency Time
Active to Precharge Delay
DRAM Data Integrity Mode
Memory Frequency For
System BIOS Cacheable
Video BIOS Cacheable
Video RAM Cacheable
Delayed Transaction
AGP Aperture Size (MB)
AGP 4X Mode
↑↓→← Move
be altered unless necessary.
DRAM Timing Selectable
By SPD
By User
CMOS Setup Utility - Copyright (C) 1984-2000 Award Software
Advanced Chipset Features
By User
2
7
Non-ECC
PC100
Disabled
Disabled
Disabled
Enabled
64M
Enabled
Enter:Select
+/-/PU/PD:Value
F5:Previous Values
F6:Fail-Safe Defaults
Award BIOS Setup Utility
Item Help
Menu Level
F10:Save
ESC:Exit
F1:General Help
F7:Optimized Defaults
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