Pioneer DVR-104 Service Manual page 51

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QQ PCM1748E (DVR R4 MAIN ASSY : IC270)
3 7 63 1515 0
D/A Converter IC
Block Diagram
BCK
LRCK
DATA
ML
MC
MD
SCK
TE
L 13942296513
Pin Assignment
(TOP VIEW)
1
BCK
DATA 2
LRCK 3
DGND 4
V 5
DD
6
V
CC
7
V L
OUT
V R 8
OUT
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Serial
Input
I/F
8x
Oversampling
Digital Filter
with
Function
Controller
Function
Control
I/F
System Clock
System Clock
Manager
16
SCK
15 ML
14 MC
13 MD
PCM1748
12 ZEROL/NA
11
ZEROR/ZEROA
10
V
COM
9 AGND
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2 9
8
DAC
Enhanced
Multi-Level
Delta-Sigma
Modulator
DAC
Zero Detect
Q Q
3 6 7 1 3 1 5
Pin Function
PIN NAME TYPE
1 BCK IN
2 DATA IN
3 LRCK IN
4 DGND –
5 V –
DD
6 V –
CC
7 V L OUT
OUT
8 V R OUT
OUT
9 AGND –
10 V –
COM
11 ZEROR/ OUT
ZEROA
12 ZEROL/NA OUT
13 MD IN
14 MC IN
15 ML IN
16 SCK IN
NOTES: (1) Schmitt-trigger input, 5V tolerant. (2) Schmitt-trigger with internal
pull-down, 5V tolerant.
co
.
DVR-104
7
9 4 2 8
Output Amp and
V
OUT
Low-Pass Filter
V
COM
Output Amp and
V
Low-Pass Filter
OUT
Power Supply
0 5 8 2 9 9 4 2 8
FUNCTION
(1)
Audio Data Bit Clock Input.
(1)
Audio Data Digital Input.
L-Channel and R-Channel Audio Data Latch En-
(1)
able Input.
Digital Ground
Digital Power Supply, +3.3V
Analog Power Supply, +5V
Analog Output for L-Channel.
Analog Output for R-Channel.
Analog Ground
Common Voltage Decoupling.
Zero Flag Output for R-Channel/Zero Flag Output
for L/R-Channel.
Zero Flag Output for L-Channel/No Assign.
(2)
Mode Control Data Input.
(2)
Mode Control Clock Input.
(2)
Mode Control Latch Input.
System Clock Input.
m
8
9 9
A
L
B
R
C
9 9
D
E
F
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