802SH
Pin No.
Terminal name
164
SE_CK/PORT1
165*
SE_LD2/PORT3
166
VDDIOC
167*
PWM1/PORT8
168
GPI2
169
GSR
170
VDDVD
171
RESET_B
172
VDDIOA
173
BUFOFF_B
174
RD_B
175
VDDCORE
176
DUMMY1
PDX0E1DG
: OSC (Oscillator buffer with oscillation stop function)
TYBUF04P
: IOC2M (I/O buffer. Input: CMOS buffer, Output: Iol = 2 mA)
TYBUF04S
: IOCS2M (I/O buffer. Input: CMOS Schmidt buffer, Output: Iol = 2 mA)
TYBUF02P
: IOC (I/O buffer. Input: CMOS buffer, Output: Iol = 4 mA)
TYBUF02P_PD : IOCD (I/O buffer. Input: CMOS buffer with 65 k ohm pull-down resistance, Output: Iol = 4 mA)
TYBUF02S
: IOCS (I/O buffer. Input: CMOS Schmidt buffer, Output: Iol = 4 mA)
TYBUF02S_PU : IOCSU (I/O buffer. Input: CMOS Schmidt buffer with 75 k ohm pull-up resistance, Output: Iol = 4 mA)
TYBUF02S_PD : IOCSD (I/O buffer. Input: CMOS Schmidt buffer with 65 k ohm pull-down resistance, Output: Iol = 4 mA)
TYBUF03P (A) : IOCAN6M (I/O buffer. Input: 2 inputs AND type CMOS buffer with through current protection, Output: Iol = 6 mA)
TYBUF03S (A) : IOCSAN6M (I/O buffer. Input: 2 inputs AND type CMOS Schmidt buffer with through current protection, Output: Iol = 6 mA)
TYBUF03S (O) : IOCSOR6M (I/O buffer. Input: 2 inputs OR type CMOS Schmidt buffer with through current protection, Output: Iol = 6 mA)
RECIVER_V3.4 : VD-Link receiver
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
DUMMY
1
CORE
DB00
CORE
VDD
DB01
IOA
DB02 DB03
DB06
DB04
VDD
DB08
IOA
GPO6
DB09
DB13 DB10
VDD
DB14
IOA
GPO7 GPI5
LCD
WAIT
INT
VDD
CORE
XIN/
SCANCK
PLL
DIV0
DIV2
VDD
PLL
DUMMY
3
16
CONFIDENTIAL
Input/Output
TYBUF04P
Four-wire serial IF clock output/general purpose output
TYBUF04P
Four-wire serial IF load signal 2/general purpose output (Not used)
–
Power supply
TYBUF04P
PWM output 1/general purpose output (Not used)
TYBUF02S_PU
General purpose input
RECIVER_V3.4
External resistance pin for gain adjustment
–
Power supply
TYBUF02S
Master reset
–
Power supply
TYBUF02P
GATED buffer switching signal for through current protection
TYBUF03S (O)
Host read strobe signal
–
Power supply
–
Dummy 1
VDD
BUFOF
VDD
RESET
VDD
RD_8
F_B
IOA
_B
VD
VDD
WR_B
CS_B
VDON GPO0
RXCKN RXCKP
MAG
VDWAIT
RSP
RXDTN
BUSY
_B
DB05
NC
GND
NC
SCANE
DB07
N
GPCLK
GND
DB11
TESTI
DB12 GND
DB15
NC
GND
SDA
_B
PLL
GPI4
SCL GND
NC
GND
PLL
SUB
SUB
SUB
NC
DIV1
LPIN
DB6
DB2
PLL
SUB
VDD
SUB
SUB
SUB
SUB
CKS
CORE
RD_B
CK
DB5
DB3
SUBFL
VDD
SUB
SUB
VDD
SUB
MIN
IOD
RS
DB7
IOD
DB4
15
14
13
12
11
10
Description of terminal
PWM1/
VDD
SE_LD2
SE_CK/
GSR GPI2
PORT8
IOC
/PORT3
PORT1
PWM0/
PWMLCD
SE_LD3
SE_LD1
GPI0
PORT7
/PORT9
/PORT4
/PORT2
SE_LD4
RXDTP
GPI1 GPI3
GPO11
/PORT5
GNDVD
NC
GND
GPO10
GND
VSYNC
RDATA
GND
GPO1
NC
GDATA
GND
GDATA
NC
GDATA
GND
RDATA
RDATA
1
GND
NC
NC
GND GND GPO5
OSC
SUB
SUB
BSPIXE
GPO9
BSCLK
NC
DB1
WR_B
L7
SUB
OSC
BSVS
BSBLK
BSPIXE
GPO8
DB0
OUT
_B
_B
SUB
VDD
OSC
BSHS
VDD
BSPIXE
CS_B
OSC
IN
_B
IOB
9
8
7
6
5
TOP VIEW
6 – 30
VDD
SE_DI/
DUMMY
P
IOC
PORT6
2
SE_DO
VDD
VDD
O
/PORT0
CORE
CORE
GPO2 GPO3
N
M
NC
HSYNC
DCLK
SUBDB
MP4_PL
L
7
LCK
RDATA
RDATA
K
4
3
2
RDATA
RDATA
J
1
0
GDATA
VDD
I
5
4
IOB
GDATA
GDATA
H
3
2
1
BDATA
GPO4
G
0
0
RDATA
VDD
F
2
3
IOB
BDATA
BDATA
E
5
4
BSPIXE
NTCLK
D
L0
BSPIXE
VDD
C
IOB
L1
BSPIXE
VDD
BSPIXE
B
L6
L4
CORE
L2
BSPIXE
VDD
DUMMY
A
L5
L3
CORE
4
4
3
2
1