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Motherboard Description
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Supports DDR SDRAM CL 2/2.5/3 and 1T/per command
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Decoupled and burst DRAM refresh with staggered RAS timing.
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CAS before RAS or self refresh
1-9 CHIPSET
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VT8633
The Pro266 chipset is a high performance, cost-effective and energy
efficient chip set for the implementation of AGP / V-Link / PCI / LPC
desktop personal computer systems from 66 MHz, 100 MHz and 133 MHz
based on 64-bit Socket-370 and Slot-1 (Intel Pentium-III and Celeron)
super-scalar processors.
The Pro266 chip set consists of the VT8633 V-Link DDR Host system
controller (552 pin BGA) and the VT8233 highly integrated V-Link Client
PCI/LPC controller (376 pin BGA). The Host system controller provides
superior performance between the CPU, DRAM, AGP bus, and V-Link
interface with pipelined, burst, and concurrent operation. The VT8233 V-
Link Client controller is a highly integrated PCI / LPC controller. Its
internal bus structure is based on 66 MHz PCI bus that provides 2x
bandwidth compare to previous generation PCI/ISA bridge chips. The
VT8233 integrated Client V-Link controller with 266MB/S bandwidth
between Host/Client V-Link interface, provides a V-Link-PCI and V-
Link-LPC controller. It supports five PCI slots arbitration and decoding for
all integrated functions and LPC bus.
The VT8633 supports eight banks of SDR / DDR SDRAMs up to 4 GB.
The DRAM controller supports standard Synchronous DRAM (SDRAM),
and Virtual Channel SDRAM (VC SDRAM or VCM) SDRAM in a
flexible mix / match manner, or it can be configured to support Double-
Data-Rated (DDR) SDRAM mode. The SDR/DDR DRAM interface
allows zero wait state bursting between the DRAM and the data buffers at
66 / 100 / 133 MHz. The eight banks of DRAM can be composed of an
arbitrary mixture of 1M / 2M / 4M / 8M / 16M / 32M / 64M xN DRAMs.
The DRAM controller also supports optional ECC (single-bit error
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SY-7VDA
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