JVC VS-DT2000R Service Manual page 33

LC72723 (IC3) : RDS decoder
1. Terminal layout
VREF 1 16 RDS-ID/READY
MPX 2 15 RDCL
VDDA 3 14 RDDA
VSSA 4 13 RST
FLOUT 5 12 MODE
CIN 6 11 VDDD
TEST 7 10 GND
XOUT 8 9 XIN
3. Pin function
Pin No. Symbol
1 VREF
2 MPX
3 VDDA
4 VSSA
5 FLOUT
6 CIN
7 TEST
8 XOUT
9 XIN
10 GND
11 VDDD
12 MODE
13 RST
14 RDDA
15 RDCL
16 RDS-ID/READY
NJM4580D-D (IC101,IC211,IC212,IC213) : Dual operational amplifier
1. Terminal layout & Block diagram
8 7 6 5
B
A
1 2 3 4
RPM6938-SV4 (IC801,IC812) : Remote control receiver
1. Block diagram
AMP
I/V
conversion
for
PD
trimming circuit
magnetic shield
2. Block diagram
VDDA
REFERENCE
VOLTAGE
VSSA
ANTIALIASING
MPX
FILTER
TEST TEST
I/O
O Reference voltage output (Vdda/2)
I Base band (multiplex) signal input
- Analog system power supply (+5V)
- Analog system ground
O Subcarrier output (filter output)
I Subcarrier input (comparator input)
I Test input
O Crystal element output (4.332MHz)
I Crystal element input (or external reference signal input)
- Digital system ground
- Digital system power supply (+5V)
I Readout mode setting (0:master, 1:slave)
I RDS ID and RAM reset (Active high logic)
O RDS data output
I/O RDS clock output (master mode)/RDS clock input (slave mode)
O RDS ID/ready output (Active low)
1. A OUTPUT
2. A -INPUT
3. A +INPUT
4. V -
5. B +INPUT
6. B -INPUT
7. B OUTPUT
8. V +
Vcc
22k
AGC
ohm
Comp
BPF
Detector
VREF FLOUT CIN
PLL
(57kHz)
V
REF
57kHz
BPF
SMOOTHING
(SCF)
FILTER
CLK(4.332MHz)
OSC
XIN XOUT
Function
VDD
OUT
GND
VS-DT2000R
VDDD
CLOCK
RECOVERY
(1187.5Hz)
GND
RDDA
DATA
DECODER
RDCL
RAM
MODE
(128 bits)
RST
RDS-ID/
RDS-ID
DETECT
READY
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