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Q601 : YSS912
SDOB Interface
/CSB
SCK
SI
SDIB Interface
SDIBSEL
SDOA Interface
OPORT0-7
AC-3/Pro Logic/DTS
SCK
SI
SO
/CS
IPORT0-7
SDIA Interface
No.
24 * 16
OVFB
Sub DSP
RAMA0-16
RAMOEN
RAMWEN
RAMCEN
RAMD0-7
SDIB3
10
SDIB2
SDIB1
11
SDIB0
12
SDOA2
SDOA1
SDOA0
13
14
15
24 * 24
Main DSP
16
17
decoder
18
CPO
19
Input Buffer
XO
XI
20
CRC
21
22
SDIASEL
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
Name
I/O
FUNCTION
1
VDD1
-
+5V power supply (for I/Os)
2
RAMCEN
O
External SRAM interface /CE
3
RAMA16
O
External SRAM interface address 16
4
RAMA15
O
External SRAM interface address 15
5
SDIB0
I+
PCM input 0 to Sub DSP
6
SDIB1
I+
PCM input 1 to Sub DSP
7
SDIB2
I+
PCM input 2 to Sub DSP
8
XI
I
Crystal oscillator connection (12.288 MHz)
9
XO
O
Crystal oscillator connection
VSS
-
Ground
AVDD
-
+3.3 V power supply (for PLL circuit)
SDIB3
I+
PCM input 3 to Sub DSP
TEST
Test terminal (to be open in normal use)
TEST
Test terminal (to be open in normal use)
OVFB
O
Detection of overflow at Sub DSP
DTSDATA
O
Detection of DTS data
AC3DATA
O
Detection of AC-3 data
SDOB3
O
PCM output from Sub DSP
CPO
A
Output terminal for PLL, to be connected to ground
through the external analog filter circuit
AVSS
-
Ground (for PLL circuit)
VDD2
-
+3.3 V power supply (for core logic)
SDOA2
O
PCM output from Main DSP (C, LFE)
SDOA1
O
PCM output from Main DSP (LS, RS )
SDOA0
O
PCM output from Main DSP (L, R)
RAMA14
O
External SRAM interface address 14
RAMA13
O
External SRAM interface address 13
RAMA12
O
External SRAM interface address 12
RAMA11
O
External SRAM interface address 11
RAMA10
O
External SRAM interface address 10
VSS
-
Ground
VDD1
-
+5V power supply (for I/Os)
OPORT0
O
Output port for general purpose
OPORT1
O
Output port for general purpose
OPORT2
O
Output port for general purpose
OPORT3
O
Output port for general purpose
OPORT4
O
Output port for general purpose
OPORT5
O
Output port for general purpose
OPORT6
O
Output port for general purpose
OPORT7
O
Output port for general purpose
VSS
-
Ground
VDD2
-
+3.3 V power supply (for core logic)
RAMA9
O
External SRAM interface address 9
RAMA8
O
External SRAM interface address 8
RAMA7
O
External SRAM interface address 7
SDOB2
O
PCM output from Sub DSP
SDOB1
O
PCM output from Sub DSP
SDOB0
O
PCM output from Sub DSP
SDBCK1
I+
Bit clock input for SDOA, SDIB, SDOB
SDWCK1
I+
Word clock input for SDOA, SDIB, SDOB
VSS
-
Ground
VDD2
-
+3.3 V power supply (for core logic)
NONPCM
O
Detection of non-PCM data
CRC
O
Detection of AC-3 CRC error
MUTE
O
Detection of auto mute
KARAOKE
O
Detection of AC-3 karaoke data
43
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