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1
3. BLOCK DIAGRAM and SCHEMATIC DIAGRAM
3.1 OVERALL BLOCK DIAGRAM
A
U601 VXF1060
ANT
TV FRONT-END
RF IN
SIF
VOUT
RF
7
17
OUT
u-com
SIF
B
JA801
V/Y In
R/C In
AV2
L In
JA802
V/Y In
AV1
L In
C
D
FRJB ASSY
CN501
CN203
FRONT INPUT
(9P)
(9P)
(INPUT2)
POWER
KEY1
9
JA502
9
VIN2
VIN2
VIDEO
7
7
LIN2
LIN2
L
5
5
R
D
CN101
SPDL
MOTOR
Pickup
LD
DRIVE
A
E
B
C
D
S4
S3
S2
S1
PICKUP
CN501
ASSY
LOADING
F
M
MOTOR
CN502
STEPPIONG
M
MOTOR
14
1
2
UVV
to CN601 Pin 1
C
1/2
SCRB ASSY(1/2)
Tuner U-com
(45P)
5
4
3
2
32
36
35
31
38
PB DVD/CD
37
RF IC
40
39
IC101
UPC3340GC
(12P)
6CH
Driver
IC501
BD7997FS
2
3
: Recording system signal route
Interface IC
HA118326APFR(1/2)
UVV
18
AV1_V
16
2V
14
AV2_V
12
R/C
49
9
5
from
LIN4
87
CN601 Pin 11
LIN3
90
LIN2
92
LIN1
94
DVD Audio
77
from
CN301 Pin 23
IC202 SDRAM
16Mbit
DSP
IC203 FLASH
16M
IC201
UPD63641GM
DRIVE ASSY(R9R)
DVR-230-S
3
4
: Playback system signal route
IC101
V/Y
61
C
59
L
80
AV1 L Out
to Pin 74
AV2 L Out
to Pin 72
UPD61181F1-105MN2A
[ATAPI]
1
DVD-VR
8
DVD-Video
CN3801
CN202
(40P)
(40P)
F
MAIN ASSY
4
IC1001
(EMMA2RL)
1 Chip
Sysytem Codec
Flash
32Mbit
IC1102
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