Kenwood TK-3230 Service Manual page 8

TK-3230
PLL System
■ VCO Circuit
The VCO is housed in a shield case.
The VCO circuit consists of a transistor (Q2), a variable
capacity diode (D2) for frequency control, a variable capacity
diode (D4) for modulation, transmit/receive frequency shift
diode (D1), control transistor (Q1), variable capacitor (TC1)
for PLL lock voltage control, and oscillator buffer amplifi er
(Q5).
LV
T/R
MOD
3C
■ PLL Circuit
Frequency data is sent to the PLL IC (IC1) from the MCU
(IC403) as serial data when the power turns on, when the
channel is changed, or when transmission begins. It sets
the variable divider in the PLL IC.
The TCXO (X1) produce a 12.8MHz reference frequency.
It is divided to produce a 6.25kHz/5kHz PLL comparison
frequency in the PLL IC.
This PLL IC can generate a channel step which is twice
of the PLL comparison frequency. Hence, the PLL IC can
directly generate channel step by 12.5kHz/10kHz. Beside,
an external control voltage of TCXO is used to shift TCXO
reference frequency by 6.25kHz/5kHz to achive channel
step with 6.25kHz/5kHz generate in the PLL IC.
The VCO output is divided by the divide ratio set by
the divider in the PLL IC to generate 6.25kHz/5kHz. It is
compared with the reference comparison frequency by the
8
CIRCUIT DESCRIPTION
C14
L4
R1 L15 L2
R6
R7
Q1
CP1
+ +
+
PLL IC
Loop filter
IC1
LV
F OUT
VCO FIN1
3C,T/R,MOD VCO OUT
In receive mode, the shift signal T/R goes low, Q1 turns
off, and the shift diode (D1) not contact. Q2 produces
the first local frequency for reception. (Receive channel
frequency – 38.85MHz)
In transmit mode, the shift signal T/R goes high, Q1
turns on and D1 does conducts. Q2 produces about
460~470MHz and the VCO frequency equals the transmit
channel frequency.
The 3.0V circuit voltage is produced by ripple removing
fi lter circuit Q4.
C27
Q2
R17 L6
R23
Fig. 7 VCO circuit
phase comparator to detect a phase difference.
The charge pump circuit in the PLL IC converts it to a
control voltage that can drive the VCO directly.
The control voltage passes through a loop filter which
passes low frequency and is applied to the VCO control pin
to control the oscillator frequency. The loop fi lter removes
unwanted harmonics and noise contained in the output from
the phase comparator and determines PLL response and
synchronizing characteristics by the amplitude and phase
characteristics (Fig. 8).
■ Unlock Detection Circuit
If the PLL cannot be synchronized for some reason or
other when switching the channel or changing between
transmission and reception, the PLL IC outputs a low unlock
detection signal. This signal goes to the MCU to inhibit
transmission when the PLL is unlocked.
XIN
3C
MCU (IC403)
LD
UL
STB
PLL data
DATA
(MCU)
CK
Fig. 8 PLL circuit
R29
C33
VCO
OUT
Q5
Q4
+
X1 12.8MHz
TCXO
TO
IC100
3M
DAC