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FGZ201ELF2/ERF2
MICROCOMPUTER'S TERMINAL DESCRIPTION
Pin No.
Pin Name
37~39
A18~A20
40
VCC
41
A21
42
VSS
43
RD
44
NC
45
SH_VMUTE
46
NC
47
WRH
48
WRL
49
CS1
50
CS0
51~53
NC
54
CS2
55
VSS
56
ROM_RESET
57
ROM_RY/BY
58
NC
59
DACK
60
NC
61
VSS
62
DREQ
63
VCC
64~68
NC
69
SYSCS
70
IRL
71
VSS
72
SHCON
73~76
D12~D15
77
VCC
78
D11
79
VSS
80~84
D6~D10
85
VCC
86
D5
87
VSS
88~92
D0~D4
93
VSS
94
XTAL
95
MD3
10
I/O
O
Address bus output
-
Power supply
O
Address bus output
-
Ground
O
External device read-out Strobe output
-
Un-connecting
O
Graphic microprocessor video mute request output
-
Un-connecting
O
An external device higher rank side write-in output
O
An external device low rank side write-in output
O
Chip selection output (inside register of Q2i)
O
Chip selection output (flash ROM)
-
Un-connecting
O
Chip selection output (Q2iUGM)
-
Ground
O
Flash ROM reset output
I
Flash ROM lady busy input
-
Un-connecting.
O
Q2iDMA transmission Strobe output
-
Un-connecting.
-
Grand input
I
Q2iDMA transmission demand input
-
Power supply
-
Un-connecting.
I
Graphic microprocessor Request-to-Send input
I
Q2i interrupt request input
-
Ground
I
Graphic microprocessor standby control input
I/O
Data bus input and output
-
Power supply
I/O
Data bus input and output
-
Ground
I/O
Data bus input and output
-
Power supply
I/O
Data bus input and output
-
Ground
I/O
Data bus input and output
-
Ground
I
Crystal oscillator input
I
Mode setting input of operation
Purpose / Description / Processing / Operation
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