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Appendix II: Post Error Code for BIOS
POST (hex)
37h:
Test DMA Channel 1.
39h:
Test DMA page registers.
3Ch:
Test 8254
3Eh:
Test 8259 interrupt mask bits for channel 1.
40h:
Test 8259 interrupt mask bits for channel 2.
43h:
Test 8259 functionality.
47h:
Initialize EISA slot
49h:
1. Calculate total memory by testing the last double word of each 64K page.
2. Program write allocation for AMD K5 CPU.
4Eh:
1. Program MTRR of M1 CPU
2. Initialize L2 cache for P6 class CPU & program CPU with proper cacheable
range.
3
Initialize the APIC for P6 class CPU.
4
On MP platform, adjust the cacheable range to smaller one in case the
cacheable ranges between each CPU are not identical.
50h:
Initialize USB Keyboard & Mouse.
52h:
Test all memory (clear all extended memory to 0)
53h:
Clear password according to H/W jumper (Optional)
55h:
Display number of processors (multi-processor platform)
57h:
1. Display PnP logo
2. Early ISA PnP initialization
-Assign CSN to every ISA PnP device.
59h:
Initialize the combined Trend Anti-Virus code.
5Bh:
(Optional Feature)
Show message for entering AWDFLASH.EXE from FDD (optional)
5Dh:
1. Initialize Init_Onboard_Super_IO
2. Initialize Init_Onbaord_AUDIO.
60h:
Okay to enter Setup utility; i.e. not until this POST stage can users enter the
CMOS setup utility.
63h:
Reset keyboard if Early_Reset_KB is not defined.
65h:
Initialize PS/2 Mouse
62
Description
A26361-D1691-Z120-1-7619, Edition 1
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