Main(Reg) Schematic Diagram - JVC GR-D370UC Schematic Diagrams

MAIN(REG) SCHEMATIC DIAGRAM

0 1 MAIN(REG)
TO MAIN IF(CN101) BATT_CHK
TO MAIN IF(CN101), BATT_+
JACK
L6001
OPEN
L6002
OPEN
!
F6001
NMFZ007-2R5X-K
TO JACK ADP_DC
C6003 C6005
OPEN 1
TO CPU CHRG_EVR
R6713
100k
R6717
18k
C6707
820p
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked ( ) is not used.
TL6002
R6708 R6709
15k 110k
TL6001
C6703 R6710
OPEN 120k
R6711
OPEN
IN7-
FB7
C6704
R6712
0.0047
560
IN6C-
R6715
4.7k FB6C
C6705 R6714
0.01 470
IN6-
FB6
C6706 R6716
220p 8.2k
IN5-
IC6001
FB5
C6509 R6512 C6510 R6513
FA7737F
0.033 47k 0.0047 27k
IN4+
IN4-
C6405
0.01
FB4
IN3+
IN3-
C6305
0.1
FB3
IN2-
FB2
C6203 C6204 R6204
0.001 220p 8.2k
R6103
8.2k
C6103
220p
R6803
1k
C6104 C6804
680p 0.0039
(No.YF124)2-23
C6701
GND
D6801
RB551V-30-X
L6802 L6801 µ
OPEN 47
NQL365K-470X
C6802
10
IN12- R6106
100k
FB12
R6105 Q6103
C6105 RSR025P03-X
12k S
0.01
G
OUT12
C6511
0.1
D
OUT11
C6512
OUT10
0.1
OUT7S
OUT6S
R6107 R6108 C6106
0.1
24k 36k
OUT6P
_0.5% _0.5%
C6107
OUT5P
0.022
R6110
OUT4P
3.3k
OUT3P
OUT2N
OUT2P
OUT1N
OUT1P
PGND1
TL6003
C6011
R6007 1
OPEN
2-24(No.YF124)
Q6701 L6701 Q6702
µ R6702
D6702
RSR025P03-X 39 RSR025P03-X
0.2
NQL52EM-390X 0.25W
NRV142F-R20X RB160M-30
C6702
1 D6701 Q6703
10
RB160M-30 RSR025P03-X
Q6201
L6201 µ R6704 R6705
39 1M 1M
G D
NQL87EN-390X
S
A CA
C6202
C6201 US5U29-W
OPEN 10
D
Q6202
OPEN
G
S
Q6101
L6101
39µ
G D
NQL87EN-390X
S
A CA
C6102
US5U29-W
C6101
D 10
1
Q6102
OPEN
G R6517
S OPEN
R6518
OPEN
Q6301
L6301
µ
47
G D
R6304
NQL62EM-470X
S
12k
A CA
C6302
C6301 US5U29-W
1 C6303 R6303
R6305
1
0.068 100k
10k
Q6401
L6401 µ
47
G D
R6404
NQL62EM-470X
S
47k
A CA
C6402
C6401 US5U29-W
1
C6403 R6403
OPEN
1 27k
Q6501 L6502
C6502 µ
RSR025P03-X 1 10
D6503
1SS355
NQL38DK-100X
D6501
OPEN R6509
3 2 OPEN
4 1
C6501 L6501
C6504
1 !
220µ
OPEN
NQL52EM-221X
C6503
D6504
1 Q6504
1SS355
OPEN
R6510
OPEN
R6505
OPEN
R6506
R6503 C6507 C6508
OPEN
OPEN OPEN OPEN
D6505
1SS355 1 4
C6506
1
2 5
Q6502
6 3
D6502 OPEN Q6503
R6504
OPEN OPEN
1 4 OPEN
C6505
R6507
1
OPEN
2 3 R6508
OPEN
D6506
1SS355
!
D6001
RB715W-X
! R6010 1
1k 2
3
yf124_y10599001a_rev1.1
REGRTC_OUT
REGRTC_CLK TO CPU
REG_CS
TO MAIN IF(CN104),CPU
SYS_RSTL
R6001
1k
I_MTR
R6008
TO CPU
82k
_0.5%
V_BATT
R6009
33k
_0.5%
M_UNREG TO MDA
TO PARAGON,VIDEO
REG_1.7V
REG_4.8V
L6702
OPEN
M_REG4.8 TO MDA,OP DRV
R6721
0Ω
REG_3.1V
TO PARAGON
REG_12V
REG_8.5V TO MONI/VF
Q6506
OPEN
C6514 D6508
OPEN
OPEN
DRUM_PWR
TO MDA
DRUM_ERR
D_GAIN TO CPU
CAP_PWR
TO MDA
CAP_ERR
REG_15V TO CDS/TG,MONI/VF
D6507
C6513
UDZS8.2B-X
OPEN
R6519
R6514 R6515
150K
6.8k 1k
REG_-7.5V TO CDS/TG
Q6505
2SA1774/QR/-X
REG_2.5V TO PARAGON,PRE/REC
AL_3.1V TO MAIN IF(CN101),CPU
LIT_3V TO CPU
GND
LITHIUM TO MAIN IF(CN101)