Panasonic PV-GS19P Service Manual page 85

PV-GS19P / PV-GS31P / PV-GS32P / PV-GS35P / PV-GS19PC / PV-GS31PC / PV-GS34PC / PV-GS35PC
VIDEO SIGNAL PROCESS I BLOCK DIAGRAM
MAIN C.B.A.
CAMERA
FROM CCD DRIVE
DATA (0-9)
BLOCK DIAGRAM
LUMA
TO
ANALOG VIDEO I/F
BLOCK DIAGRAM
CHROMA
LCD/EVF-R
LCD/EVF-G
TO LCD
BLOCK DIAGRAM
LCD/EVF-B
/EVF BLOCK DIAGRAM
H-SYNC
V-SYNC
ALC PWM CONTROL
TO AF
IRIS CLOSE
BLOCK DIAGRAM
IRIS OPEN
JACK C.B.A.
SD SLOT
B7001 B1
29,30,34,35 29,30,34,35
B7001 B1
33 33
SD B7001 B1
CARD
31 31
B7001 B1
2 2
B7001 B1
1 1
B7001 B1
TPB(-) 1
12 12
B7001 B1
TPB(+) 2
13 13
JK7002
B7001 B1
DV JACK TPA(-) 3
14 14
B7001 B1
TPA(+) 4
15 15
GND 5
JK7003
R7004
B7001 B1
USB 39 39
(W/O USB2.0
JACK R7005
HIGH-SPEED) B7001 B1
40 40
FL7001
LINE
FILTER
R404 R405
(WITH USB2.0 HIGH-SPEED)
(WITH USB2.0 HIGH-SPEED)
IC3001 (CAMERA DIGITAL SIGNAL PROCESS/SHUFFLING)
51 52
CAMERA SIGNAL
54 61 PROCESS
D/A
259
CONVERTER
D/A
264
CONVERTER
D/A
242
CONVERTER
D/A
248
CONVERTER
D/A
253
CONVERTER
319 H-SYNC
318 V-SYNC
73 ALC PWM CONTROL
75 IRIS CLOSE
76 IRIS OPEN
X3002
(W/O USB2.0
HIGH-SPEED) 281 48MHz CLOCK
48MHz
OSC 282 48MHz CLOCK
SD
272 275
INTERFACE
271 SD CLOCK
277 CMD
CARD DET(L)
TO SYSTEM
CONTROL
BLOCK DIAGRAM
CARD PROTECT(L)
145
148
IEEE1394
INTERFACE
150
151
(W/O USB2.0
HIGH-SPEED) R402
291
USB
R401
INTERFACE
292
IC401 (USB INTERFACE)
9 USB 68 74 201 202
INTERFACE
7 79 84 205 215
41 49
16 65
56 62
FROM CCD DRIVE
12MHz CLOCK
BLOCK DIAGRAM
REC VIDEO SIGNAL
DIGITAL SIGNAL DV FORMAT
PROCESS INTERFACE
DIS CONTROL
/ZOOM CONTROL
/EFFECT CONTROL
/JPEG
/GUI
DRAM
IC6001 (SYSTEM MICROCONTROLLER)
154 159
8 11 13 16 ADM (0 -15)
MICROCONTROLLER 162 166 169
19 22 24 26
INTERFACE
171 176 179
28
188
PV-GS19P/PV-GS19PC/PV-GS31P/PV-GS31PC/PV-GS32P/PV-GS34PC/PV-GS35P/PV-GS35PC
90
PB VIDEO SIGNAL REC AUDIO SIGNAL PB AUDIO SIGNAL
DBR DATA (4 BIT)
161
DBR(0 -3)
164
168
ADDA (4BIT)
169
ADDA(0 -3)
TO/FROM
171
VIDEO SIGNAL
173
PROCESS II
BLOCK
DIAGRAM
27MHz CLOCK 102 27MHz CLOCK
READ(H) 175 READ(H)
DRAM
VAL 174 VAL
HEAD SW PULSE 1 159 HEAD SW PULSE 1
CAMERA DAC/TG SERIAL CLOCK 302 CG/AFE SERIAL CLOCK
CAMERA DAC/TG SERIAL DATA 300 CG/AFE SERIAL DATA
TG CS(L) 303 CG CS(L)
TO/FROM
CCD DRIVE
FCK (18MHz) 48 FCK (18MHz)
BLOCK
DIAGRAM
CAM VD 50 CAM VD
CAM HD 49 CAM HD
CAMERA DAC CS(L) 304 CAMERA AFE CS(L)
183 AUDIO DATA 0
178 AUDIO DATA 1 TO/FROM
AUDIO
AUDIO SIGNAL
DIGITAL
180 AUDIO L/R CLOCK PROCESS
SIGNAL
BLOCK
PROCESS
DIAGRAM
182 AUDIO BIT CLOCK
181 AUDIO MASTER CLOCK
TXD B2
106 UART O
TO/FROM
MICROCONTROLLER 8
INTERFACE BOARD
INTERFACE
RXD B2
(FOR EVR ADJUSTMENT)
105 UART I
7
VIDEO SIGNAL PROCESS I BLOCK DIAGRAM