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11 BLOCK DIAGRAMS
CCD DRIVE BLOCK DIAGRAM
CCD UNIT
MAIN C.B.A.
IC601 (CCD)
CCD
Q601
FP301
IMAGE
7
BUFFER
14
SENSOR
FP301
4
10
FP301
3
3
FP301
2
2
FP301
1
1
FP301
10
7
FP301
9
8
FP301
12
5
FP301
13
4
IC302 (CAMERA SIGNAL PROCESS/TIMING GENERATOR)
DOUBLE
GAIN
SAMPLING
CONTROL
52
CLAMP
HOLD
AMP
IC303 (CCD V-DRIVE)
LEVEL
7
42
V1 PULSE
CHANGE
5
DRIVE
LEVEL
8
36
CHARGE PULSE 1
CHANGE
LEVEL
3
9
41
V2 PULSE
CHANGE
LEVEL
V3 PULSE
14
40
CHANGE
17
DRIVE
LEVEL
13
35
CHARGE PULSE 2
CHANGE
LEVEL
18
12
39
V4 PULSE
CHANGE
LEVEL
1
10
34
SUB CONTROL PULSE
CHANGE
26
RESET PULSE
27
H1 PULSE
30
H2 PULSE
89
1
5
10BIT A/D
CAMERA DATA (10 BIT)
CONVERTER
8
12
DC CONT
61
64
SERIAL INTERFACE
63
62
FCK
17
VD
15
HD
16
X301
36MHz
2FCK
23
OSC
22
12MHz CLOCK
32
PV-GS19P/PV-GS19PC/PV-GS31P/PV-GS31PC/PV-GS32P/PV-GS34PC/PV-GS35P/PV-GS35PC
PV-GS19P / PV-GS31P / PV-GS32P / PV-GS35P / PV-GS19PC / PV-GS31PC / PV-GS34PC / PV-GS35PC
REC VIDEO(CAMERA) SIGNAL
CAMERA DATA (0-9)
CAMERA AFE CS (L)
CG/AFE SERIAL CLOCK
CG/AFE SERIAL DATA
CG CS (L)
TO/FROM VIDEO SIGNAL PROCESS I
BLOCK DIAGRAM
2.85 Vp-p
V1
FCK (18.0MHz)
CAM VD
CAM HD
1 V
5 ms
12MHz CLOCK
CCD DRIVE BLOCK DIAGRAM
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