Pd Board - Sony KP-48V75 Service Manual

[
DECODER, Y/V/U CONTROL,
PD
3D COMB FILTER, P&P CONTROL
– PD Board –

PD BOARD

1 2
DIODE *
Q3401 C-6 2
D3003 D-15 3 Q3402 D-7 2
3 1
D3051 E-14 Q3403 B-10
A
3 1
D3052 E-14 Q3404 D-9
3 Q3405 D-10 2
D3201 C-5
D3202 C-5 3 Q3406 D-10 1
D3205 C-5 3 Q3407 D-10 1
2
D3401 C-6 3 Q3408 D-8
1
Q3409 B-10
TRANSISTOR *
1
Q3410 D-10
1
Q3001 E-12 Q3411 B-8 2
2 B
Q3002 D-5 Q3412 D-8 2
Q3003 D-4 2
Q3413 D-10 1
Q3004 D-13 1
Q3414 B-8 2
Q3005 D-4 2 2
Q3415 D-8
Q3006 E-5 2 1
Q3416 D-10
1
Q3007 D-15
IC
2
Q3008 E-1
2 IC3001 D-4
Q3009 D-1
Q3010 D-1 2 IC3002 D-4
C
Q3201 B-16 1 IC3003 D-1
Q3202 B-16 1 IC3004 D-2
2
Q3203 C-2 IC3201 A-4
2
Q3204 C-2 IC3202 B-2
1
Q3205 C-15 IC3203 B-4
Q3206 C-15 1 IC3204 C-2
Q3207 C-12 1 IC3205 A-2
Q3208 C-4 2 IC3402 A-6
D
Q3209 C-4 2 IC3403 C-11
2
Q3210 C-4 IC3404 B-6
2 IC3405 E-6,E-11
Q3211 B-1
Q3214 B-16 1 IC3407 D-7,D-10
Q3217 C-14 1
E
PD BOARD : IC3004 CXA1315M
13
LEVEL CONVERTION
SDA 14
LEVEL
CONVERTION
SCL 15
POWER
ON
RESET
LATCH
–
Vcc 16 DAC
+
Vcc
REG
AMP
8 3
GND
– 82 –
]
3 4 5 6 7
< Component Side >
PD BOARD : IC3403 µPC659AGS
V AVcc
CL
12 11 2 1 9 10
7 8
LATCH LEVEL CONVERTION
4 CLAMP S / H
6
I 2 C DECODER
A/D CONV.
LATCH LATCH LATCH LATCH TIMING
ADD
CLK 24
GEN.
DAC DAC DAC DAC
AMP AMP AMP AMP
18 19 23 22
DVcc DGND OVER DB1
4 5 6 7
– 83 –
10
8 9 11
• PD BOARD WAVEFORMS
V V AGND 1
RT RB
1 10 9
1.6Vp-p (H)
6
D/A A/D CONV.
1.3Vp-p (H)
11
LATCH
21 20 17 16 15 14 13
DB2 DB3 DB4 DB5 DB6 DB7 DB8
2.0Vp-p (H)
16
2.2Vp-p (H)
NOTE:
• : Pattern from the side which enables seeing.
• : Pattern of the rear side.
12 13 14 15 16
< Conductor Side >
2 3 4 5
2.0Vp-p (H) 0.11Vp-p (500kHz) 1.0Vp-p (H) 0.9Vp-p (H)
7 8 9 10
1.7Vp-p (H) 1.0Vp-p (H) 1.0Vp-p (H) 1.4Vp-p (3.58MHz)
12 13 14 15
5.0Vp-p (V) 0.8Vp-p (H) 0.9Vp-p (H) 3.4Vp-p (20MHz)
17 18 19 20
1.9Vp-p (H) 2.4Vp-p (H) 0.11Vp-p (500kHz) 0.12Vp-p (3.58MHz)
– 84 –