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Microprocessor And Ic Data - Marantz SD4050 /N1B Service Manual

Marantz sd4050 cassette deck service manual

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6. MICROPROCESSOR AND IC DATA

U42 : CXT82940
1. Pin Functions
Pin code
I/O
Functions
(Port A)
8-bit I/O port. I/O can
be set in a unit of
PA0/AN0
single bits.
I/O/
to
Incorporation of pull-up
Analog inputs to A/D converter. (8 pins)
Analog input
PA7/AN7
resistor can be set
through the software in
a unit of 4 bits.
(8 pins)
PB0
I/O
(Port B)
PB1/CS0
I/O/Input
Chip select input for serial interface (CH0).
8-bit I/O port. I/O can
PB2/SCK0
I/O/I/O
Serial clock I/O (CH0).
be set in a unit of
single bits.
PB3/SI0
I/O/Input
Serial data input (CH0).
Incorporation of pull-up
PB4/SO0
I/O/Output
Serial data output (CH0).
resistor can be set
through the software in
PB5/SCK1
I/O/I/O
Serial clock I/O (CH1).
a unit of 4 bits.
PB6/SI1
I/O/Input
Serial data input (CH1).
(8 pins)
PB7/SO1
I/O/Output
Serial data output (CH1).
(Port C)
8-bit I/O port. I/O can
be set in a unit of single
bits. Capable of driving
Serves as key return inputs when operating
PC0/KR0
12mA sync current.
to
I/O/Input
key scan with fluorescent display panel (FDP)
Incorporation of pull-up
PC7/KR7
segment signal (8 pins).
resistor can be set
through the software in
a unit of 4 bits.
(8 pins)
Input/Input/Input
PE0/INT0/EC
Inputs for
external
Input/Input
PE1/INT1
interruption
PE2/INT2
Input/Input
request.
(Port E)
(4 pins)
PE3/INT3/
Input/Input/Input
8-bit port. Lower 6 bits
NMI
are for inputs; upper
Input/Input
Remote control reception circuit input.
PE4/RMC
2 bits are for outputs.
(8 pins)
PE5
Input
Carrier output of remote control transmission
PE6/RMCO
Output/Output
circuit.
Output/Output/
Output for the timer/counter rectangular waves,
PE7/TO/ADJ
Output
and 32kHz oscillation dividing frequency.
(Port F)
PF0/SCL0
Output/I/O
Transfer clock I/Os for I
4-bit output port,
PF1/SCL1
operating as N-ch open
drain output for large
PF2/SDA0
current (12mA).
Output/I/O
Transfer data I/Os for I
PF3/SDA1
(4 pins)
(Port G)
8-bit I/O port. I/O can be set in a unit of single bits.
PG0 to PG3
I/O
Incorporation of pull-up resistor can be set through the software in a unit
of 4 bits.
(4 pins)
(Port D)
PD0/S0
to
Output/Output
8-bit output ports.
PD7/S7
(8 pins)
S8 to S11
Output
FDP segment signal outputs. (4 pins)
T8/S12
Outputs for FDP timing signals/segment signals.
to
Output/Output
(8 pins)
T15/S19
T0 to T7
Output
FDP timing signal outputs.
V
FDP voltage supply when incorporated resistor is set by mask option.
FDP
EXTAL
Input
Crystal connectors for system clock oscillation. When the clock is
supplied externally, input to EXTAL; opposite phase clock should be
XTAL
Output
input to XTAL.
Crystal connectors for 32kHz timer/counter clock oscillation. Set 32kHz
TEX
Input
crystal oscillator between TEX and TX. For usage as event input, attach
TX
Output
clock source to TEX, and open TX.
RST
Input
Low-level active, system reset.
NC
NC. Under normal operation, connect to V
AV
Positive power supply for A/D converter.
DD
AV
Input
Reference voltage input for A/D converter.
REF
AV
A/D converter GND.
SS
V
Positive power supply.
DD
V
GND.
SS
AN0 to AN7
T8/S19 to T15/S12
S0 to S11
KR0 to KR7
External event inputs for
timer/counter.
Non-maskable interruption
request input.
PE1/INT1
2
C bus interface.
PE2/INT2
PE3/INT3/NMI
PE4/RMC
2
C bus interface.
PE5
PE6/RMCO
PE7/TO/ADJ
PB0
PB1/CS0
PB2/SCK0
FDP segment signal outputs.
PB3/SI0
(8 pins)
PB4/SO0
PB5/SCK1
PB6/SI1
PB7/SO1
PA0/AN0
PA1/AN1
PA2/AN2
PA3/AN3
PA4/AN4
PA5/AN5
PA6/AN6
PA7/AN7
AV
DD
.
DD
17
2. Block Diagram
2
8
A/D CONVERTER
T0 to T7
8
FDP
8
CONTROLLER/
RAM
DRIVER
12
V
FDP
8
KEY SCAN
RAM
BUFFER
RMCO
REMOCON OUT
RAM
RMC
REMOCON IN
FIFO
CS0
SERIAL
BUFFER
SI0
INTERFACE
SO0
RAM
UNIT (CH0)
SCK0
SERIAL
SI1
SO1
INTERFACE
FIFO
SCK1
UNIT (CH1)
EC
8 BIT TIMER/COUNTER 0
2
TO
8 BIT TIMER 1
SCL0
SCL1
I
2
C BUS
INTERFACE UNIT
SDA0
SDA1
ADJ
2
3. Pin Configuration
80
79
78
77
76
75
74
73
72
71
70 69 68 67
66
65
1
64
2
63
3
62
4
61
5
60
6
59
7
58
8
57
9
56
10
55
11
54
12
53
13
52
14
51
15
50
16
49
17
48
18
47
19
46
20
45
21
44
22
43
23
42
24
41
35
25 26 27 28 29 30
31 32 33
34
36
37
38
39
40
Note) NC (Pin 75) must be connected to V
DD.
CLOCK
8
SPC 700
GENERATOR
CPU CORE
SYSTEM CONTROL
8
8
ROM
RAM
40K/48K/52K/60K
2048 BYTES
BYTES
8
6
2
4
PRESCALER/
32KHz
TIME BASE TIMER
TIMER/COUNTER
4
U305 : CXA1561S
22
21
20
19
18
MOA
T7
T8/S19
T9/S18
T10/S17
T11/S16
MOA
T12/S15
IREF
T13/S14
T14/S13
T15/S12
S11
1
2
3
4
5
S10
S9
S8
PD7/S7
PD6/S6
PD5/S5
U310 : PC1297CA
PD4/S4
PD3/S3
V
V
V
PH
C
CC
R2
IN(R)2
2
IN2
18
17
16
15
14
PD2/S2
PD1/S1
ABSO
PEAK
PD0/S0
DET
DET
V
FDP
PC7/KR7
PC6/KR6
POWER
THERMO
REGULATOR
DETECT
ABSO
PEAK
DET
DET
1
2
3
4
5
V
V
V
PH
C
ST
R1
IN(R)1
1
IN1
18
PA0 to PA7
PB0 to PB7
PC0 to PC7
PD0 to PD7
PE0 to PE5
PE6 to PE7
PF0 to PF3
PG0 to PG3
17
16
15
14
13
12
V
CC
SSK
REC AMP
KLS
HDET
LDET
LLS
Mode
Control
KLS
HDET
LDET
LLS
SSK
REC AMP
V
EE
6
7
8
9
10
11
C
V
V
V
OUT2
OUT21
OUT22
IN(O)
13
12
11
10
V C A
PRE.
DRIVER
V C A
6
7
8
9
C
V
V
GND
OUT1
OUT11
OUT12

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