Samsung HP-R5052 Service Manual page 104

Circuit Description
1. Logic Block
■ Logic Block Diagram
SDA, SCL
TX, RX
Y-MAIN
CONTROL
SIGNAL
ADC 4bit
R,G,B : 16bit
CLK A, B
BLK, POL, STB
60pin Connector
13-12
31Pin LVDS
LVDS
SIGNAL
SPS-NIRB
DDR
(ASIC 816P)
(FA)
74MHz
CONTROL
SIGNAL
MICOM
30MHz
ADC 1bit
10Pin(Power)
RELAY_EINT
AC-OFF-EINT
Vs-ON
60MHz
DDR
(MA)
DATA : 32bit
ADDR : 12bit
DQS, CLK, nCLK
DDR
(MB)
DRIVE
RESET
ASIC
nRESET
60pin Connector
X-MAIN
CONTROL
SIGNAL
ADC 3bit
R,G,B : 16bit
CLK A, B
BLK, POL, STB
Samsung Electronics