Philips FM242 Service Manual page 71

Colour television
Table of Contents

Advertisement

9.1.1
Input/Output
The main inputs are:
Basic: VGA only,
Enhanced: VGA, Flex-VGA, DVI-D, HD-RGB+HV, HD-
2fH-YPbPr (sync on Y), 1fH-YCbCr (sync on Y), YC, CVBS
on cinch. Flex-VGA gives the user a choice to configure the
'loop-through VGA output' as an output or as input.
9.1.2
Video
This mainly consists of an analogue processing part and a
digital processing part. The video inputs like VGA (Basic
configuration), CVBS, YC, HD-RGB/YUV (1fH and 2fH) and
DVI-D are received and processed.
The VGA signals are first converted to digital signals and then
processed by the PW Scaler.
The YPbPr (2fH) signal is discretely converted to RGB,
whereas the YCbCr (1fH) signal is processed in the SAA7118
Digital Video decoder.
The base-band video inputs (CVBS and YC) are output from
this decoder as digital YUV, which are then further processed
by the Pixel Works Scaler (PW).
The signals on the digital DVI input are first decoded by the
TMDS decoder inside the AD9887 and then processed by the
PW Scaler.
The PW Scaler output is going through an EPLD and then via
an LVDS Encoder to the SDI PDP (Plasma Display Panel) as
differential serial data. This PDP has a resolution of 852(H) x
480 (V) pixels.
9.1.5
Power Supply
Connectors
Sync
decode
YPbPr
Y/G
Pb/B
RGB
Pr/R
AV3
H,V
Digital Video
YC
Decoder
AV2
SAA7118
AV1
3D Comb*
CVBS
D
NVM
DVI-D
V
DDC
I
+5V
+8V6
V
Loop thru of RG
B
Contro l
G
and H,V signals
Flex
A
from VGA1 only
2
NVM
DDC
+5V_STBY_SW
RS
Sub-D
232
9 P
C
+5V
RC5 to RCout
RC
buffer
out
V
RC5 to VGA1
G
buffer
In
A
1
NVM
+5V_STB Y_SW
DDC
Audio processing
L/R VGA in
L/R CVBS
L/R YC
L/R HD
L/R DVI
L/R Flex VGA
(only output in
Basic config.)
audio
enable
+9V_STBY
! All Functional blocks shaded grey are required for
the"Basic Configuration".
The remainder is required for the "Enhanced Configuration".
are optional or prepared
*
Circuit Descriptions and List of Abbreviations
+5V
+3V3
+5V
NVM
32Kbit
Video +
Sync
+8V6
switching
ADC +
+8V6
TMDS
Decoder
AD9887
De-interlacer
PW164_10R or 10RK
SDA9400
+3V3
+3V3
PW/OTC
+5V_STBY_SW
Switch
4052
ST
RS 232
IO Exp-
+5V_STBY_SW
Driver
SC1
PCF8574
ADC Exp
+5V
PCF8591
+5V_STBY_SW
RS232
Interrupt
gener.
Sync.
Interrupt
Gener.
Temp.Sensor
+5V_STBY_SW
Discrete
+8V6
electronics
+5V_STBY_SW
Interrupt
Audio amplifier
+8V6
Per channel
+5V
MSP Audio Processor
MSP3415G
+8V6
Audio Switch
TEA6422D
Audio Delay
+5V
32KSRAM CY7C1399
VSND_NEG
Output
+8V6
Switch
Figure 9-2 Power Supply Path
9.1.3
Audio
This mainly hosts the audio inputs for the various video inputs.
They go through an I
audio processing is done by the Micronas MSP3415G version
with built-in UltraBass-II algorithm.
A digital delay line is created using the I
The delay created can be selected between two values, one for
the Receiver box, and one for the Monitor.
The processed audio signals are then differentially transmitted
to the audio amplifier panel. This amplifier drives a tweeter and
a twin-drive woofer (low/mid range). Active filtering is done
prior to the amplifiers.
9.1.4
Control
The main controller is the OTC, referred to as the 'main
processor'. This operates in co-ordination with the processor in
the Pixel Works Scaler (PW), referred to as the 'co-processor'.
When the FM242 monitor is connected to an F21R Receiver
box, the UART commands from the Receiver box will control
the monitor.
In stand-alone mode, the monitor can be controlled via the
Remote Control or via the RS232C port.
DDC1/2B (Digital Data Channel, an I
implemented with separate identification NVMs for the two
VGA inputs and the DVI-D input as well. In addition, the
RS232C port can be used for software download to the PW and
the OTC. The target for downloading is controlled via a switch
in the RS232C path; the switch itself is controlled by the OTC.
Video
+3V3
+3V3
+8V6
SRAM
Flash ROM
128kbyte
2Mbyte
Local
converter
+2V5
+2V5
PW
LVDS
EPLD
PixelWorks
Encoder
EP1K30FC
DS90C385
Video Scaling
Co-processor
Clock
PROM
+3V3
generator
+5V
for EPLD
+3V3
Power ON
Reset
Flash
ROM
2Mbyte
DRAM
OTC
2Mbyte
NVM
Main Processor
32Kbit
SAA5801H/xx
+8V6
+5V
+3V3_STBY_SW
+5V_STBY_SW
service
int. pins
VGA1
Switch
4052
UART
gener.
PSU
+9V_STBY
RC/LED/switch panel
Tweeter
HP Filter +
Mute
Amp
+8V6
LP Filter +
Mute
Amp
Low
/Mid
+9V_STBY
VSND_POS
IR RXr
Light
Red
(RC in)
Sensor
LED
FM242 AA
2
C controlled source selector. The main
2
PDP
Vpr2
MPU
Vcc
Vs,Va
PSU
AC/DC, DC/DC converters
Audio supply, 5V,8V6, 3v3, Vs,Va
Protection
*
3v3,5v Standby PSU
Fan driver
+5V_STBY_SW
IO expander
VSND_NEG
VSND_POS
ON/OFF switch
(see description)
Green
LED
CL 26532038_007.eps
010502
9.
EN 71
2
S channel and SRAM.
C-based protocol) is

Advertisement

Table of Contents
loading

Table of Contents