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K
J
I
H
G
0
9
7
CL4208
1
F
E
131
130
129
R4335
0
CE0
128
R4336
0
CE1
127
PIO2/DMAACK0
126
CL4206
PIO0/DMADONE
125
1
C4224
VSS
124
D
0.1
VDDC
123
RESET
122
R4245
43
SDCLK1
121
OE
120
R4244
33
ADDR15
119
CE2
118
CL4227
CE3
117
1
PON
116
TRST
115
R4243
33
PIO20/PCST1
114
C
SDCLKIN
113
R4242
33
ADDR4
112
R4241
33
ADDR3
111
C4221
R4240
33
ADDR2
110
10P
C4220
VDDS
109
0.1
VDDS
108
R4238
33
R4239
PIO23/PCST2
107
4.7K
CL4204
PIO18/TCLK/CHIDIN
106
1
CL4203
19/TIMER1/CHICLK
105
1
R4236
33
ADDR1
104
B
C4219
R4235
33
ADDR0
103
0.1
VDDC
102
VSS
101
VSS
100
C4218
VDDC
99
0.1
R4231
33
PIO21/PCST4
98
R4230
33
PIO22/PCST3
97
SWE
96
UAE
95
A
BWE3
94
BWE2
93
PIO30/PCST8
92
1
2
3
4
CE0
CE1
RESET
OE
ADDR15
CE2
PONRESET
TRST
PCST1
ADDR4
ADDR3
ADDR2
PCST2
ADDR1
ADDR0
PCST4
PCST3
SWE
UAE
R4229
33
PCST8
5
6
7
8
DM-1 BOARD (DM-B) MIPS CPU [UPPER RIGHT]
5
4
1
2
PCIRESET
R4384
0
INTA
9
10
11
12
C23
IC426
TC7S08F
3
13
14
15
16
K
FROM/TO I/O(DM-G)
CPURESET
J
PONRESET
IORESET
RXD
TXD
JORESET
TO GM-G
FROM/TO CHIP SET
I
PCICLK1
PCIAD0
PCIAD1
PCIAD2
PCIAD3
PCIAD4
PCIAD5
PCIAD6
PCIAD7
H
PCIAD8
PCIAD9
PCIAD10
PCIAD11
PCIAD12
PCIAD13
PCIAD14
PCIAD15
PCIAD16
PCIAD17
G
PCIAD18
PCIAD19
PCIAD20
PCIAD21
PCIAD22
PCIAD23
PCIAD24
PCIAD25
PCIAD26
PCIAD27
F
PCIAD28
PCIAD29
PCIAD30
PCIAD31
REQ1
GNT1
C_BE0
C_BE1
C_BE2
E
C_BE3
FULLRESET
FRAME
IRDY
TRDY
STOP
DEVSEL
SERR
PAR
PERR
D
INTC
INTD
TO DM-D
RESET
TO DM-E & DM-F
C
FROM/TO MPEG
PCICLK2
PCIAD0
PCIAD1
B
PCIAD2
PCIAD3
PCIAD4
PCIAD5
PCIAD6
PCIAD7
PCIAD8
PCIAD9
PCIAD10
PCIAD11
A
PCIAD12
PCIAD13
17
18
19
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