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Controller Theory of Operation: Controller
In order for each circuit block to respond only to the data intended for it, each peripheral has its own
chip select (or chip enable) line. The device will only respond to data when its enable line is pulled
low by one of the microprocessor ports, as follows:
• port PD5 (U401 pin 2) for the audio filter IC
• port PH0 (U401 pin 47) for the synthesizer IC
• port PH4 (U401 pin 43) for the option board/display enable
• port PD6 (U401 pin 3) for the serial EEPROM.
3.1.1.4 Interface to RSS Programming
The radio can be programmed, or the programmed information can be read, using a computer with
CPS (Customer Programming Software) connected to the radio via a RIB (radio interface box) or
with the RIB-less cable. Connection to the radio is made via the microphone connector (part of
accessory connector J471). The SCI line connects the programming contact (J471 pin 6) to ports
PD0_RXD (data into uP, pin 97) and PD1_TXD (data out of uP, pin 98). Transistor Q410 isolates the
input and output functions by allowing PD1 to pull the line low, but does not affect incoming data from
being read by port PD0. This isolation allows high-speed 2-wire programming via TP401 and TP402
for factory programming and tuning.
3.1.1.5 Storage of Customer-Specific Information
Information that has been programmed using CPS, such as channel frequencies or selective
signaling codes, are stored in the external EEPROM, where it is retained permanently (unless
reprogrammed) without needing DC power applied to the microprocessor.
3.1.1.6 Sensing of Externally-Connected Accessories
Port PJ1 is used to detect the presence of externally connected accessories. Port PJ1 (U401 pin 72)
is normally low, unless accessories (lapel speaker microphone, lightweight headset, etc.) are used
with the radio. This port is used to detect an accessory PTT or auto sensing of a VOX accessory.
If VOX is programmed into the radio channel codeplug information, and PJ1 is high during power-up,
the radio will activate VOX operation. If a low is present at port PJ1 during power-up, the radio will
use this port as an external PTT indicator.
3.1.1.7 Microprocessor Power-Up, Power-Down and Reset Routine
On power-up, the microprocessor is held in reset until the digital 3.3 V regulator (U320 pin 5)
provides a stable supply voltage. Once the digital supply reaches steady state and releases the reset
line (U320 pin 7), the microprocessor begins to start up. The ASFIC_CMP (U451) has already
started running and is providing the startup clock to the microprocessor. After reset release by all
circuits, the software within the microprocessor begins executing port assignments, RAM checking,
and initialization. A fixed delay of 100 ms is added to allow the audio circuitry to settle. Next, an alert
beep is generated and the steady state software begins to execute (buttons are read, radio circuits
are controlled).
When the radio is turned off, SWB+ is removed and port PE0 (U401 pin 67) goes low, initiating a
power-down routine. Port PH3 (pin 44) remains high, keeping the voltage regulators on via Q493
and Q494, until the operating state of the radio has been stored in EEPROM. PH3 then goes low,
and all regulated voltages are removed.
HKLN4216A
3-3
November 24, 2003
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