Benchmark DAC1 PRE Instruction Manual page 19

2-channel 24-bit 192-khz digital-to-analog audio converter with preamp functions and usb input
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Better converters usually use a two-stage PLL
circuit to filter out more of the interface jitter.
In theory, a two-stage PLL can remove
enough of the jitter to achieve accurate 24-bit
conversion (and some do). However, not all
two-stage PLL circuits are created equal.
Many two-stage PLL's do not remove enough
of the low-frequency jitter. In addition, two-
stage PLL circuits often require several
seconds to lock to an incoming signal.
Finally, a two-stage PLL may fail to lock when
jitter is too high, or when the reference
sample frequency has drifted.
UltraLock™ converters exceed the jitter
performance of two-stage PLL converters, and
are free from the slow-lock and no-lock
problems that can plague two-stage PLL
designs. UltraLock™ converters have
extremely high immunity to interface jitter
under all operating conditions. No jitter-
induced artifacts can be detected using an
Audio Precision System 2 Cascade test set.
Measurement limits include detection of
artifacts as low as –140 dBFS, application of
jitter amplitudes as high as 12.75 UI, and
application of jitter over a frequency range of
2 Hz to 200 kHz. Any AES/EBU signal that
can be decoded by the AES/EBU receiver will
be reproduced without the addition of any
measurable jitter artifacts.
The DAC1 PRE, DAC1, DAC-104, ADC1 and
the ADC-104 employ Benchmark's
UltraLock™ technology to eliminate jitter-
induced performance problems. UltraLock™
technology isolates the conversion clock from
the digital audio interface clock. Jitter on a
D/A digital audio input, or an A/D reference
input can never have any measurable effect
on the conversion clock of an UltraLock™
converter. In an UltraLock™ converter, the
conversion clock is never phase-locked to a
reference clock.
Instead the converter
oversampling-ratio is varied with extremely
high precision to achieve the proper phase
relationship to the reference clock. The clock
isolation of the UltraLock™ system insures
that interface jitter can never degrade the
quality of the audio conversion. Specified
performance is consistent and repeatable in
any installation with cables of any quality
level!
DAC1 PRE Instruction Manual
Rev J
How does conversion clock jitter
degrade converter performance?
Problem #1: Jitter phase modulates the
audio signal. This modulation creates
sidebands (unwanted tones) above and below
every tone in the audio signal. Worse yet,
these sidebands are often widely separated
from the tones in the original signal.
Jitter-induced sidebands are not musical in
nature because they are not harmonically
related to the original audio. Furthermore,
these sidebands are poorly masked (easy to
hear) because they can be widely separated
above and below the frequencies of the
original audio tones. In many ways, jitter
induced distortion resembles intermodulation
distortion (IMD). Like IMD, jitter induced
distortion is much more audible than
harmonic distortion, and more audible than
THD measurements would suggest.
Jitter creates 'new audio' that is not
harmonically related to the original audio
signal. This 'new audio' is unexpected and
unwanted. It can cause a loss of imaging, and
can add a low and mid frequency 'muddiness'
that was not in the original audio.
Jitter induced sidebands can be measured
using an FFT analyzer.
Problem #2: Jitter can severely degrade the
anti-alias filters in an oversampling converter.
This is a little known but easily measurable
effect. Most audio converters operate at high
oversampling ratios. This allows the use of
high-performance digital anti-alias filters in
place of the relatively poor performing analog
anti-alias filters. In theory, digital anti-alias
filters can have extremely sharp cutoff
characteristics, and very few negative effects
on the in-band audio signal. Digital anti-alias
filters are usually designed to achieve at least
100 dB of stop-band attenuation. But, digital
filters are designed using the mathematical
assumption that the time interval between
samples is a constant. Unfortunately, sample
clock jitter in an A/D or D/A varies the
effective time interval between samples. This
variation alters the performance of these
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