ASROCK P55 Extreme User Manual page 61

processor that supports Hyper-Threading technology and an operating
system that includes optimization for this technology, such as Microsoft
® TM
Windows XP or Vista
Vista TM , or Linux kernel version 2.4.18 or higher. This option will be hidden
if the installed CPU does not support Hyper-Threading technology.
Active Processor Cores
Use this item to select the number of cores to enable in each processor
package. Configuration options: [All], [1] and [2]. The default value is [All].
A20M
Use this item to enable or disable A20M. Legacy OS and AP may need A20M
enabled. The default value is [Disabled].
Intel (R) SpeedStep(tm) tech.
Intel (R) SpeedStep(tm) tech. is Intel's new power saving technology.
Processor can switch between multiple frequency and voltage points to
enable power savings. The default value is [Enabled]. Configuration options:
[Auto], [Enabled] and [Disabled]. If you install Windows
[Auto], you need to set the "Power Schemes" as "Portable/Laptop" to en-
able this function. If you install Windows
function, please set this item to [Enabled]. This item will be hidden if the
current CPU does not support Intel (R) SpeedStep(tm) tech..
Please note that enabling this function may reduce CPU voltage and lead to system
stability or compatibility issue with some power supplies. Please set this item to
[Disable] if above issue occurs.
Intel (R) TurboMode tech
Use this item to enable or disable Intel (R) Turbo Boost Technology. Turbo
mode allows processor cores to run faster than marked frequency in specific
condition. The default value is [Enabled].
Intel (R) C-STATE tech.
Intel (R) C-STATE tech. is achieved by making the power and thermal con-
trol unit part of the core logic and not part of the chipset as before. Migration
of the power and thermal management flow into the processor allows us
to use a hardware coordination mechanism in which each core can re-
quest any C-state it wishes, thus allowing for individual core savings to be
maximized. The CPU C-state is determined and entered based on the low-
est common denominator of both cores' requests, portraying a single CPU
entity to the chipset power management hardware and flows. Thus, soft-
ware can manage each core independently, while the actual power man-
agement adheres to the platform and CPU shared resource restrictions.
. Set to [Enabled] if using Microsoft
® TM
Vista
6 1 6 1 6 1
6 1 6 1
®
® ®
Windows XP,
® XP and select
and want to enable this