Table Of Contents - Intel 82555 Datasheet

1.0 INTRODUCTION.......................................................................................................................... 1
1.1 Functional Overview ........................................................................................................1
1.2 Compliance to Industry Standards .................................................................................. 1
2.0 ARCHITECTURAL OVERVIEW................................................................................................... 3
2.1 100 Mbps Mode............................................................................................................... 3
2.2 10 Mbps Mode................................................................................................................. 4
2.3 Media Independent Interface (MII) .................................................................................. 5
3.0 PIN DEFINITIONS........................................................................................................................ 7
3.1 Pin Types ....................................................................................................................... 8
3.2 Clock Pins ...................................................................................................................... 8
3.3 Twisted Pair Ethernet (TPE) Pins ................................................................................... 8
3.4 Media Independent Interface (MII) Pins ......................................................................... 8
3.5 Media Access Control/Repeater Interface Control Pins ................................................. 9
3.6 LED Pins ......................................................................................................................10
3.7 External Bias Pins ........................................................................................................10
3.8 Miscellaneous Control Pins ..........................................................................................11
3.9 Power and Ground Pins ...............................................................................................12
4.0 100BASE-TX ADAPTER MODE OPERATION ..........................................................................13
4.1 100BASE-TX Transmit Clock Generation .....................................................................13
4.2 100BASE-TX Transmit Blocks ......................................................................................13
4.2.1
4.2.2
4.2.3
4.2.4
4.3 100BASE-TX Receive Blocks .......................................................................................16
4.3.1
4.3.2
4.3.3
4.3.4
4.3.5
4.4 100BASE-TX Collision Detection ..................................................................................17
4.5 100BASE-TX Link Integrity and Auto-Negotiation Solution ...........................................18
4.5.1
4.5.2
4.5.3
4.6 Auto 10/100 Mbps Speed Selection ..............................................................................19
4.7 Adapter Mode Addresses ..............................................................................................19
5.0 10BASE-T FUNCTIONALITY IN ADAPTER MODE ..................................................................21
5.1 10BASE-T Transmit Clock Generation..........................................................................21
5.2 10BASE-T Transmit Blocks ...........................................................................................21
5.2.1
5.2.2
5.3 10BASE-T Receive Blocks ............................................................................................21
5.3.1
5.3.2
Datasheet
100BASE-TX 4B/5B Encoder ....................................................................13
100BASE-TX Scrambler and MLT-3 Encoder ...........................................14
100BASE-TX Transmit Framing ................................................................15
Transmit Driver ..........................................................................................16
Adaptive Equalizer .....................................................................................17
Receive Clock and Data Recovery ............................................................17
MLT-3 Decoder, Descrambler, and Receive Digital Section......................17
100BASE-TX Receive Framing .................................................................17
100BASE-TX Receive Error Detection and Reporting ...............................17
Link Integrity...............................................................................................18
Auto-Negotiation ........................................................................................18
Combination Tx/T4 Auto-Negotiation Solution...........................................18
10BASE-T Manchester Encoder................................................................21
10BASE-T Driver and Filter .......................................................................21
10BASE-T Manchester Decoder................................................................21
10BASE-T Twisted Pair Ethernet (TPE) Receive Buffer and Filter............21
Networking Silicon - 82555
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