DFI-ITOX G4S300-B User Manual page 67

Rev. a+ system board
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Manual
3.1.3.2 CAS Latency Time
This field is used to select the local memory clock periods.
3.1.3.3 Active to Precharge Delay
The options are 5, 6, 7 and 8.
3.1.3.4 DRAM RAS# to CAS# Delay
The options are 2, 3 and 4.
3.1.3.5 DRAM RAS# Precharge
This field controls RAS# precharge (in local memory clocks).
3.1.3.6 Memory Frequency For
This field is used to select the memory clock speed of the DIMM.
The system board supports DDR333 or DDR400 when using
800MHz FSB CPU. DDR333 will run at 320MHz memory fre-
quency when used with 800MHz FSB CPU. Under such circum-
stance, make sure this field is set to Auto or DDR320.
Refer to chapter 1 (System Memory section) for detailed specifi-
cation of the memory supported by the system board.
3.1.3.7 DRAM R/W Timing
This field is used to select the read/write cycle speed. Select "Fast"
if you want the system to run at a faster cycle speed.
3.1.3.8 System BIOS Cacheable
When this field is enabled, accesses to the system BIOS ROM
addressed at F0000H-FFFFFH are cached, provided that the cache
controller is enabled. The larger the range of the Cache RAM, the
higher the efficiency of the system.
If you want better system performance other
than the one "by SPD", select "Manual" then se-
lect the best option in the "CAS Latency Time"
to "DRAM RAS# Precharge" fields.
BIOS Setup
67
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