Receiver Circuit Description; Rf Amplifier (Q301), First Mixer (Q302); If Amplifier (Q401), Limiter/Mixer/Detector (U401) - E.F. Johnson LTR-Net 7243 Service Manual

7.5vdc 1 and 4 watts part no. 242-7243-xxx
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the C5V input voltage. This converter has a built-in
relaxation oscillator and rectifier. The frequency of
operation is determined by L201. The built-in rectifier
combined with an internal temperature compensated
reference provide a stable output voltage with a
minimum number of external components. The output
voltage on pin 4 in U203 is filtered by R215, C218,
C220 and then fed to pin 4 in U202.
The charge pump output on pin 6 of U202
charges and discharges C214 and C215 in the loop
filter to produce the VCO control voltage. The loop
filter is formed by R218-R221 and C214-C216. This is
a low-pass filter which controls synthesizer stability
and lock-up time and suppresses the 6.25 kHz refer-
ence frequency.

4.3 RECEIVER CIRCUIT DESCRIPTION

NOTE: A block diagram of the RF and logic boards is
located on page 8-8.
4.3.1 RF AMPLIFIER (Q301), FIRST MIXER
(Q302)
The receive signal from the antenna is fed
through the harmonic rejection filter (L107-L110,
C113-C118) and the PIN diode antenna switch (D101,
D102, L112) to RF amplifier Q301. The bandpass
filter on the input of this stage attenuates the image
and other unwanted frequencies and also prevents the
injection signal from being fed out to the antenna. The
passband of this filter is controlled by a signal from
pin 102 of the microprocessor. This voltage changes
the capacitance of varactor diodes D302 and D303 to
vary the center frequency from 430 to 470 MHz.
Impedance matching with RF amplifier Q301 is
provided by C308, C314, and S301. The RF amplifier
stage is used to recover filter losses and improve
receiver sensitivity. The output of Q301 is fed to
another bandpass filter that is similar in design.
Impedance matching with this bandpass filter is
provided by C318-C322 and L304.
The output of second bandpass filter is applied to
gate 1 of first mixer Q302. This is a dual-gate GaAs
FET device which mixes the receive frequency with
the first injection frequency to produce a first IF of
45.3 MHz (low-side injection is used). The injection
frequency is from the synthesizer, and it is fed through
a low pass filter (C520, C521, L506) which attenuates
harmonic frequencies present in the injection signal.
Impedance matching on the input of Q302 is
provided by C328, L307, and L308. Likewise, imped-
ance matching on the output is provided by C341,
C337, C338, and L312. The first IF signal is then fed
to monolithic crystal filter XFL401/XFL402. This
filter attenuates wideband noise, adjacent channels,
frequencies resulting from intermodulation, and other
frequencies close to the receive channel.
4.3.2 IF AMPLIFIER (Q401), LIMITER/MIXER/
DETECTOR (U401)
From crystal filter XFL401/XFL402, the IF
signal is fed to IF amplifier Q401 and then to limiter/
mixer/detector U401. This device contains second
mixer and oscillator, limiter, detector, squelch, and
RSSI stages.
The IF signal is fed in on pin 16 which is the
input of an internal mixer. The 45.3 MHz first IF
signal is mixed with the 44.845 MHz second injection
signal to produce a second IF of 455 kHz. The second
injection signal is produced by an internal oscillator
and controlled by crystal X401.
The 455 kHz second IF is fed out of U401 on
pin 3 and applied to ceramic filters XFL403 and
XFL404 which attenuate wideband noise. A switching
network consisting of D401A/B and D402A/B routes
the IF signal through XFL403 with wide band chan-
nels, and through XFL404 with narrow band chan-
nels. This switching network is controlled by the
narrow/wide signal from pin 45 of the micropro-
cessor. This signal is high for wideband channels and
low for narrow band channels. Therefore, with wide-
band channels, U402B is on and U402A is off which
forward biases D401A/D402A and reverse biases
D401B/D402B. With narrow band channels, the oppo-
site occurs.
The 455 kHz signal from these filters is then fed
back into U401 on pin 5 and applied to a limiter-
amplifier stage. From the limiter the signal is fed to
the quadrature detector. An external phase-shift
network connected to pins 10 and 11 shifts the phase
of one of the detector inputs by 90° at 455 kHz (the
4-3
CIRCUIT DESCRIPTION
November 2001
Part No. 001-7240-001

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