Dv Main Schematic Diagram - JVC GR-DVP7U Service Manual

4.7

DV MAIN SCHEMATIC DIAGRAM

0 1 MAIN (DV MAIN)
R3051 100
TO CAM.DSP
TDB
TCMK
TO REGCON
TMS
CN114
TDO
5 TRST
L3003
DIGITAL_2.5V
TO CAM.DSP
REG_2.5V
∗
REG_1.8V
TO REG REG_3V
C3004
GND
L3002
DIGITAL_3V
NQR0129-002X
C3003
1
L3005
DIGITAL_1.8V
NQR0006-001X
C3007 NCB10JK-106X
10
4 L3004
ANALOG_2.5V
NQR0006-001X
C3005
10 /6.3
T
L3006
ANALOG_1.8V
∗
C3008
10 /6.3
T
MA2Z720-X
D3004 L3001
PHY_2.85V
NQR0129-002X
C3001
10 /6.3
T
R3023
Q3001
1k
2SC4617/RS/-X
L3013
3
NQR0129-002X
R3005
∗
C3002 C3006
0.1 0.1
2
TO
PRE/REC
AGC_OUT
VRB_AGC
VREF_1.1
REC_DATA
REC_CLK
REC_CTL
REF_CLK
ATFI
VRB_ATF
L3012
NQR0006-001X
R3034
R3035
C3055
1
R3041
1
∗
∗
NOTE : The parts with marked ( ) is not used.
A B
C3047
0.1
C3041 C3040
∗ ∗
NC
NC
MON0
MON1
VDDE
VCC
MON2
MON3
MON4
MON5
VSS
MON6
MON7
MON8
MON9
MON10
C3042
0.01 MON11
MON12
C3043 VDDE
VCC
0.01
MON13
MON14
MON15
MON16
MON17
MON18
MON19
VSS
MON20
MON21
MON22
MON23
VDDE
MON24
MON25
MON26
MON27
VDDE
C3044 0.1
NC
VDDP
VSSP
VDDA
VSS
NC
NC
VDDE
VSS
VSS
VDDE
VDDI
VSS
VDDE
VDDE
VDDI
VSS
VSS
MTEST
C3045 0.1
PHYAVD2
R3052 10k
BUSRST
PHYAVS2
PMODE
R3053
10k
PWR3
R3054 10k
PWR1
R3055
10k
PWR2
VDDI
PHYAVS1
PHYAVD3
C3046 0.01
PHYAVD1
VSS
A/D VCO D/A D/A
VDDE
VDDI
VSS
IC3004
SN74AHC1G04DF-X
R3050 C3011
0.1
100
0.1 C3060
∗
R3049
∗
R3029
∗
IC3002 ∗
∗
R3024
0Ω
C3061
R3040
VCO
∗
IC3003
R3036
R3037
Q3002
2SC4617/RS/-X
C3058
C D
NOTES : For the destination of each signal and further line connections that are cut off from
this diagram , refer to "4.1 BOARD INTERCONNECTIONS".
When ordering parts , be sure to order according to the Part Number indicated in the Parts List.
CPUBUSTYPE
CPUDSLOGIC
CPUWAITLOGIC
XCPUDSTB1
XCPUDSTB0
IC3001
JCY0172
[DVMAIN]
VCO
PWMAUDIO
A/D
L3007
R3001 ∗
2.2µ
R3003
CH
∗
∗
∗
CH
0Ω
R3009
10k
R3010
10k
R3043
270
R3058
C3052
∗
∗ 10k
C3053
0.1
E
4-15 4-16
CPUWAIT
XINT
XCPUCS
XCPURW
CPUALE
INV
INH
OUTV
OUTH
BRSI3
BRSI2
BRSI1
BRSI0
YSI3
YSI2
YSI1
YSI0
BRSO3
BRSO2
BRSO1
BRSO0
YSO3
YSO2
YSO1
YSO0
AODAT0
AODAT1
VSS
AOBCK
AOLRCK
DODAT
C3038 0.1
VDDI
DOBCK
DOLRCK ∗
C3064
AIDAT0
AIDAT1
AIMCK
AIBCK
AILRCK
DIDAT
R3033
DIMCK
2.2k
DIBCK
DILRCLK C3037
8p
OSC11O
OSC11I X3002
R3012
[24.576MHz]
0Ω
OSC24O
OSC24I
C3036 8p
VCXO12O
VCXO12I
VCXO11O
L3008 L3009
∗
VCXO11I 12µ C3050
C3031 0.1 0.001
VDDP
C3030 0.1
CH CH
VCIAUD C3032 C3033 ∗ C3034 C3035 ∗
0.001 12p
VSSP
VDDE
D3002 D3003
R3027
EC2C01C-X EC2C01C-X
VSS
10k
VDDE
NC
C3049 0.0022
LPFIN
R3045 R3046 C3048 R3028
8.2k
LPFOUT
10k 680
0.047
VDDE
PHYAVS3
PHYVSR
C3029
PHYVSA 0.01
PHYVDR
PHYVDA
C3063
∗
CH
F G
TO VIDEO I/O,
INV
CAM.DSP
INH
R3021 10 TO SERVO, CAM.DSP
OUTV
R3022 10
OUTH TO CAM.DSP
DCO3
DCO2
DCO1
TO VIDEO I/O
DCO0
CAM.DSP
DYO3
DYO2
DYO1
RA3001
DYO0
10
DCI3
DCI2
DCI1
DCI0
TO CAM.DSP
DYI3
DYI2
DYI1
DYI0
10
CLK27A
RA3002
TO
MAIN AUDIO
AODAT
AIDAT
R3006 10
AIMCK
AIBCK
AILRCK
TO SERVO
ADDT15
ADDT14
ADDT13
ADDT12
ADDT11
ADDT10
ADDT09
ADDT08
ADDT07
ADDT06
ADDT05
ADDT04
ADDT03
ADDT02
ADDT01
ADDT00
DV_WAIT
DRWSEL
DRE
DWE
DALE
DV_RST
CLK27SEL
SRV_TRK
TSR TO SERVO
FRP TO SERVO,
REGCON CN114
SPA
TO SERVO
HID1
TO
REGCON CN114
FS_PLL
MAIN_VCO
PB_CLK
DISCRI
SBE
J101
TPA+
TPA-
DV I/O
TPB+
L3010
TPB-
NQR0384-003X
L3011
NQR0384-003X
TO VIDEO I/O
PBPLLCTL
FSPLLCTL
M_VCOCTL
PBVCOCTL
y10277001a_rev0
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