Nikon Coolpix 5700 Repair Manual page 40

Pin Signal
77
78
79 XOUT
80
81 VDD
82 XCIN
83 XCOUT
84 RESET
85 BAT OFF
86 RXD
87 SREQ
88 ZPULSE 1
89 USB CONNECT
90 CMD IN2
91 MAIN RESET
92~95 SCAN OUT 1~4
96 ASIC TEST
97 ASIC RESET
98 SCAN IN 4
99 AVSS
100 BATTERY
2. Internal Communication Bus
The SY-A block carries out overall control of camera operation by detecting the input from the keyboard and the
condition of the camera circuits. The 8-bit microprocessor reads the signals from each sensor element as input data
and outputs this data to the camera circuits (ASIC) or to the LCD display device as operation mode setting data. Fig.
4-1 shows the internal communication between the 8-bit microprocessor, ASIC and SPARC lite circuits.
ASIC TEST
ASIC RESET
8-bit
Microprocessor
3. Key Operaiton
For details of the key operation, refer to the instruction manual.
SCAN IN
SCAN OUT
0 S2
1 SIZE
2 ←
3
4 AV JACK
I/O
SCK O
IC -
O
XIN I
-
I
O
I
I
I
I
I
I
I
O
O
O
O
I
-
I
Table 4-1. 8-bit Microprocessor Port Specification
S. REQ
ASIC SO
ASIC SI
ASIC SCK
Fig. 4-1 Internal Bus Communication System
0 1
S1
AF-L/AE-L
→
- DELETE
-
CONNECT
Table 4-2. Key Operation
Serial clock output ( → ASIC)
Internal connection (connect to VSS terminal directly)
Main clock oscillation terminal
Main clock oscillation terminal (3 MHz)
VDD
Clock oscillation terminal (32.768 kHz)
Clock oscillation terminal
Reset input
Battery OFF detection signal
Host wake-up input terminal
Serial communication request signal
Zoom motor drive pulse count (interruption)
USB power connection detection
Command dial input 2
SPARC reset signal
Key matrix output
ASIC control signal
ASIC reset signal
Key matrix input
Analog GND input terminal
A/D input (battery check)
DATA BUS
ASIC
2 3
MODE +/-
AFM SBS
↑ ↓
DISP LCD conversion LCD OPEN
DIN QICK
- E6 ･ E5700 -
VAA11801-R.3578.A
Outline
L : No battery
L : USB power detection
L : Reset
L : Reset
L : Reset
32-bit
SPARC lite
MAIN RESET
4 5
PW ON EL ON
TEST EXT-S2
LCD/EVF WIDE
BAT DET
MENU PLAY
6
FUNC
EXT_S1
TELE
EXT BAT
REC