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One Stop Systems Multi Port T1 Quick Manual

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Multi Port T1/E1/J1 PCI Adapter
OSS-wanPCI-CxT1E1
One Stop Systems, Inc.
OSS-wanPCI-CxT1E1 User Manual
Rev. A

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Summary of Contents for One Stop Systems Multi Port T1

  • Page 1 Multi Port T1/E1/J1 PCI Adapter OSS-wanPCI-CxT1E1 One Stop Systems, Inc. OSS-wanPCI-CxT1E1 User Manual Rev. A...

  • Page 2: Initial Setup

    Inspect the equipment for shipping damage. Save all packing material for storage or return shipment of the equipment. For repairs or replacement of equipment damaged during shipment, contact One Stop Systems, Inc. to obtain a Return Materials Authorization (RMA) number and further shipping instructions.

  • Page 3: Installation And Removal

    30g acceleration peak (11ms pulse) Vibration: 5-17 Hz 0.5” double amplitude displacement; 7-2000Hz, 1.5g acceleration. Agency Compliance Designed to meet, but not tested Pending MTBF (Telecordia TR-332 Version 6) 395,000 hours One Stop Systems, Inc. OSS-wanPCI-CxT1E1 User Manual Rev. A...

  • Page 4: Communications Controller

    (PMC-970624). See Chapter 6, In-System Programmable Logic Device (iSPLD), for information on the initialization of the waveform registers and equalizer registers. Front Panel The front panel will have 1, 2 or 4 RJ48 ports. The front panel for the OSS-wanPCI-C4T1E1 is shown below. One Stop Systems, Inc. OSS-wanPCI-CxT1E1 User Manual Rev. A...

  • Page 5: Block Diagram

    T1/E1/J1 ports. The CSU components reside on the OSS-wanPCI-CxT1E1. The tip and ring for each port are routed to the individual fully shielded RJ48C connector mounted to the PMC bezel. One Stop Systems, Inc. OSS-wanPCI-CxT1E1 User Manual Rev. A...
  • Page 6 54  AD[06]   +3.3V   AD[04]   AD[05]   55     56  GND   AD[03]    AD[02]     GND     57        58     AD[00]     AD[01]     V (I/O)     V (I/O)     59        60     REQ64#    ACK64#     +5V     +5V     61        62     +5V     +5V    One Stop Systems, Inc. OSS-wanPCI-CxT1E1 User Manual Rev. A...

  • Page 7: Memory Map

    Read D7-D0 Write D7-D0 RDY_/BSY Write All D7-D0 RDY_/BSY Extended address bit definitions Data Bit Description Data Out Data In Chip Select Note: Insert a 500ns delay between each bit/write operation One Stop Systems, Inc. OSS-wanPCI-CxT1E1 User Manual Rev. A...
  • Page 8 MCLK register. Upon power up or reset, the MCLK register provides T1 clock to all framers. Thereafter, the host can manipulate the MCLK register to provide T1 or E1 to any framer. See diagram next page One Stop Systems, Inc. OSS-wanPCI-CxT1E1 User Manual...
  • Page 9 Clock/Frame Pulse Routing Matrix (continued) One Stop Systems, Inc. OSS-wanPCI-CxT1E1 User Manual Rev. A...
  • Page 10 BTCLK as an input DE = 1: Use the rising edge of BTCLK FE = 1: Use rising edge of BTCLK Register 0x41; BTIF Frame Pulse Configuration FPMODE = 1 BTFP as an input One Stop Systems, Inc. OSS-wanPCI-CxT1E1 User Manual Rev. A...
  • Page 11 Port configuration descriptor ROOF_EDGE = 0 It is not used on this product RSYNC_EDGE = 1 Rising edge RDAT_EDGE = 1 Rising edge TSYNC_EDGE = 1 Rising edge TDAT_EDGE = 0 Falling edge One Stop Systems, Inc. OSS-wanPCI-CxT1E1 User Manual Rev. A...
  • Page 12 BIDR Register – Address = 0xD0000 MCSR Register – Address = 0xD0000 Read Only Read/Write Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 MCSR3 MCSR2 MCSR1 MCSR0 One Stop Systems, Inc. OSS-wanPCI-CxT1E1 User Manual Rev. A...
  • Page 13 Port 3= 1 COMET 3 MCLK = E1 Type[1:0] = 00 4 Ports Available = 01 1 Ports Available = 10 2 Ports Available Other values are reserved for future products. Bits 7 and 8 are Reserved bits One Stop Systems, Inc. OSS-wanPCI-CxT1E1 User Manual Rev. A...

  • Page 14: Power Led

    The ninth LED is the power LED. This bicolor LED indicates the status of the 2.5V regulator. The power LED is not software accessible Power LED 2.5 Volt Bicolor Status Green Power is OK Power is BAD One Stop Systems, Inc. OSS-wanPCI-CxT1E1 User Manual Rev. A...

  • Page 15: Reset Led

    The table below is the Altera ByteBlasterMV connector’s pin assignments: The ByteBlaster plugs into a standard 10-pin shrouded header. The key (i.e.,notch) should be oriented on the side with the configuration or programming signals, not on the side with VCC and GND. ByteBlaster ByteBlaster Connector Connector Assignments Assignments One Stop Systems, Inc. OSS-wanPCI-CxT1E1 User Manual Rev. A...

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Multi port e1Multi port j1Oss-wanpci-cxt1e1

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