Circuit Descriptions - Wavetek 39A Maintenance Manual

General
The following sections should be read with reference to the block diagram and the circuit
diagrams.
Trig Out From
Previous Channel
Trig Out From
Next Channel
Common
Remote
Control
GPIB/
RS232
Common
Hold In
INT
TRIG
Common
Common
Cursor/
CPU
Marker
Out
DC Offset
Control
DAC,s
Common
Ext
Trig
Principles of Operation
The instrument operates in one of two different modes depending on the waveform selected.
DDS mode is used for sine, cosine, haversine, triangle, sinx/x and ramp waveforms. Clock
Synthesis mode is used for square, pulse, pulse train, arbitrary and sequence.
In both modes the waveform data is stored in RAM. As the RAM address is incremented the
values are output sequentially to a Digital-to-Analogue Converter (DAC) which reconstructs the
waveform as a series of voltages steps which are subsequently filtered before being passed to
the main output connector.
The main difference between DDS and Clock Synthesis modes is the way in which the addresses
are generated for the RAM and the length of the waveform data.
Sync
Out
Trig Out
Lock Clock In/Out To
Other Channels
Waveform
FPGA
Waveform
RAM
PLL
Common
10MHz
CLK
CLK
In/Out
Common
VCA
VCA
In
SUM
Common
0-50dB
SUM
Attenuator
In
SUM Out
From Previous
Channel
Simplified Block Diagram

Circuit Descriptions

12 bit
DAC
Amplitude
Amp
Control
Amp
16MHz
Elliptic
Filter
Bessel
Filter
10MHz
Elliptic
Filter
Zero Crossing
Comparator
Output
Attenuators
Amp
DC
Offset
Sum Out
Amp
Main
Out
Attenuators
13