Table of Contents 1. I ntroduction……………………………………………………. 2. Block Diagram ……………………………………………..3. Control Pow er Circuit ……………………………………….. 4. Battery Charger ………………………………………………. 5. Line and Zero-Crossing Detection ……………………….. 11 6. I nverter Operation …………………………………………… 13 7. Active Clamp …………………………………………………… 16 8. Microprocessor ( CPU) Control Circuit ………………..17 9.
1 I ntroduction EP series is a line interactive power system that has a step wave output. It prevents impulse, surge, sag and power outage situations. It provides the UPS output load with a reliable source. It has the following functions: Boost: If the utility voltage drops to line boost activated point*, the AVR will be activated and increase the input voltage by 1.18 times of incoming utility voltage.
2 Block Diagram The Block diagram of Vesta series (refer to Figure S-1) is divided into the following parts: 2.1 Main Relay ( MAI N-RY) : It’s to switch the UPS between line mode and battery mode. 2.2 Boost Relay ( BOOST-RY) : At line mode, this is a switch used to boost UPS output voltage 18% when the utility voltage is under line boost activated point.
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CPU ( MOTOROLA/ MC68HC908JL8CSP) The Central Process Unit Electricity Sw itch It controls the + 5Vdc and + 12Vdc supplies. + 5Vdc and + 12Vdc Control Power Generator. Provide + 5Vdc (generated from 7805 regulator) and + 12Vdc power supply. Charger: The source for the Charger comes from the mains through the transformer and full-bridge inverter.
Control pow er circuit The control power (+ 12Vdc and + 5Vdc) comes from the following sources (Figure S-2). Start w ithout input AC pow er ( Cold start) : A “Cold start “is described as follows: 3.1.1 When “ON/ OFF” switch (SW1) is pressed, a positive battery current flows through SW1 to charge C15.
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Figure S-2 Control Pow er Circuit CH1: C15 Figure W-1 Cold Start Page 8 of 28 Rev. A...
4 Battery Charger The flow chart of charger is described as follows: (Figure S-3-A & Figure S-3-B) 4.1 When UPS is connected to the utility, the control power (+ 5Vdc) will be established and the CPU will start to work. 4.2 When CPU turns on Main Relay (RY01), the AC power flows into Main Transformer.
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Figure S-3-B Charger Control Circuit Page 10 of 28 Rev. A...
5 Line and Zero-Crossing Detection Please refer Figure S-4 5.1 Line Detection The input voltage is fully rectified and generates a signal. The signal will be sent to pin 11 of CPU through a voltage divider at R45, R45A and R40// R47. By monitoring this rectified sinusoidal voltage, the CPU can identify if the utility is normal or abnormal.
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Figure S-4 Line and Zero Crossing Detecting Circuit CH1: Line-I/ P CH2: Q14 collector Figure W-2 Zero Crossing Page 12 of 28 Rev. A...
6 I nverter Operation The Inverter circuit (Figure S-5-A and Figure S-5-B) and PWM control are only active under Battery mode. The Inverter circuit of Vesta is based on a full-Bridge circuitry and its output is driven by a transistor which is controlled by CPU. Refer to the Inverter circuit diagram, the CPU.M1, CPU.M2, CPU.M3, and CPU.M4 signals are generated by CPU.
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Figure S-5-A Vesta 1000 I nverter circuit Figure S-5-B Vesta 1500 & Vesta 2000 I nverter circuit Page 14 of 28 Rev. A...
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CH1: DS-N CH2: Output Voltage (1/ 200V) Figure W-3 Control logic ( 1) Page 15 of 28 Rev. A...
7 Active Clamp The purpose of Clamp is to pull down the output voltage while two sets of Inverter MOSFET are OFF. The Clamp effect is active during the period of 0Vac at battery mode. CLAMP principle is shown in the last paragraph of Chapter 6 Inverter Operation. Page 16 of 28 Rev.
8 Microprocessor( CPU) Control Circuit The CPU is supplied by + 5Vdc power supply to pin7 with ground pin at pin3. An extra oscillation circuitry consisting of C01, C02, and crystal XL1 is connected to pin4 &5. The Vesta series is using MOTOROLA/ MC68HC908JL8CSP CPU. The pin definition is listed below (Refer to Figure S-6 CPU control circuit): PI N FUNCTI ON...
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Figure S-6 CPU Control Circuit Page 18 of 28 Rev. A...
9 Relay Circuit Figure S-7 is the relay circuit. The RY01 (main relay) is used to switch between line and battery modes. When the UPS is changing from battery to line mode, CPU pin6 is set to HI to turn on Q1AP (2SC1815) and activates RY01.
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CH1 : C10(+ ) CH2 : Output Voltage (1/ 200V) Figure W-6 Output w aveform vs voltage change for relay speed-up circuitry Page 20 of 28 Rev. A...
10 Display, Audio Alarm and Control Button 10.1 Control button ON/ OFF Button: Push it to turn on UPS, and push again to turn off UPS. (Please refer to Chapter 3 for cold start & AC start) 10.2 Audio alarm The buzzer is controlled by pin16 of CPU.
11 Load Detection Circuit Load detection circuit is shown on Figure S-9. The output current is detected by current transformer CT1AX. It lowers 1000 times of output current for CPU detection. The current signal generated from CT1AX flows through a full-bridge rectifier and R3AX to convert to a voltage signal (0~ 5 Volts).
12 I nterface Circuit The interface circuit (refer to Figure S-10) USB communication, and plug & play for Windows 95/ 98/ 2000/ XP/ NT. Figure S-10 USB I nterface Circuit Page 24 of 28 Rev. A...
13 Troubleshooting WARNI NG 13.1 Troubleshooting can be done by qualified engineer or technician only. 13.2 Use isolated AC source for your oscilloscope to prevent floating voltage problem between UPS chassis ground and system reference ground. 13.3 Before opening the cover, turn off the main switch and unplug the input power cord.
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10. Check if there is a battery voltage on regulator 7805 input. 11. Check Q11 (MPS2907A), Q12 (2222ASM) and replace them if abnormal. 12. Check there is + 12Vdc on 7805 input. 13. Replace abnormal Q11. 14. Check there is + 5Vdc on U03 (7805) 15.