Cpu Memory - Panasonic EB-X400 Service Manual

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The figure shows an AD converter path, starting from the analog inputs, the buffer amplifier, the

decimating low-pass filter. The voltage is divided in an optional resistor divider to adapt to the input range of the

modulators, and the resulting voltage difference to the reference voltage Vref is converted to a 6.5 Mbit/s bitstream at the

output of the

modulator. This bitstream is converted to a 16-bit value in the decimating low pass filter.

Vin

Vref

8 Battery Temperature (TBAT) :

The battery packs used for EB-X400 contain a negative temperature coefficient thermistor. The basic parameters of the

thermistor are as follows:

R25 = 10 k

B = 3435K

8 Calibration :

And EB-X400 has values of electrical volume for A/D calibration as follows.

Battery voltage : VBAT1, VBAT2

Battery temperature : TBAT1, TBAT2

Environment temperature : TENV1, TENV2

5.2.4. CPU MEMORY

EB-X400 uses following memory configuration.

128 Mbits Flash memory organised as 4M x 16 + 4M x 16

36 Mbits RAM organised as 128k x 32 (Internal SRAM) + 2M x 16 (mobile RAM)

EB-X400 uses Dual operation Flash memory + mobile RAM 3-chip stacked type MCP (Multi-Chip Package) to reduce chip

mount spaces. 36-Mbit RAM consists of 4-Mbit internal SRAM of E-Gold + V3 and 32-Mbit external mobile RAM on the

MCP device.

RAM Timing

This Timing chart is described in U2001 (E-Gold + V3) specification:

ABRIDGED APPROVAL FORM – PMB7850 Info Sheet

FLASH Timing

This Timing chart is described in U2001 (E-Gold + V3) specification:

ABRIDGED APPROVAL FORM – PMB7850 Info Sheet

Figure 5.7. AD Converter Path

– 5-13 –

modulator and digital

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