Fujitsu MAN3184 SERIES Specifications page 15

1.34 Bus phase sequence....................................................................................................................1 - 77
1.35 Example of bus phase transition at execution of a single command ..........................................1 - 79
1.36 State of level-1 SCAM target.....................................................................................................1 - 86
1.37 State of level-2 SCAM target.....................................................................................................1 - 87
1.38 Comparison of active negate current and voltage ......................................................................1 - 92
1.39 Single-ended test circuit.............................................................................................................1 - 93
1.40 LVD transceiver architecture .....................................................................................................1 - 95
1.41 Connection to the LVD receivers...............................................................................................1 - 95
1.42 Differential SCSI bus capacitive loading ................................................................................... 1 - 96
2.1 Message format............................................................................................................................2 - 2
2.2 SCSI pointer configuration ..........................................................................................................2 - 7
C141-E123-01EN xiii