Pch 6/9 - Gpio, Cpu - Clevo P170EM Service Manual

Schematic Diagrams

PCH 6/9 - GPIO, CPU

BIOS RECOVERY
DISABLE - HIGH (DEFAULT)
ENABLE - LOW
Sheet 25 of 61
INTERNAL GFX: LOW (DEFAULT)
PCH 6/9 - GPIO,
EXTERNAL GFX: HIGH
CPU
INTEGRATED Clock Chip Enable
ICC_EN#:
HIGH - DISABLED (DEFAULT)
LOW
B - 26 PCH 6/9 - GPIO, CPU
PantherPoint - H (GPIO,VSS_NCTF,RSVD)
R342 10K_1%_04 EDP_CARD_DET# DGPU HDP (NV CONTROL BYSELF)
3.3VS
R341
*0_04 D05
3.3V
Del R672 & net USB30_SMI#
R344 10K_04 BIOS_REC
3.3VS
37 mSATA_DET#
R357
14,35
*0_04
R124 *10K_04 GFX_CRB_DET
3.3VS
R143
100K_04
37 SATA_ODD_PRSNT#
R394 10K_04 TEST_SET_UP
3.3VS
R393
*0_04
R160 10K_04 ICC_EN#
3.3V
R163
*1K_04
- ENABLED
3.3V
R147 1K_04 HOST_ALERT#1
R379 10K_04 HOST_ALERT#2
R365 *10K_04 PLL_ODVR_EN
R164 *1K_04
PLL_ODVR_EN:
HIGH- ENABLED (DEFAULT)
LOW - DISABLED
3.3VS
RN11
1 8 SCI#
2 7 SMI#
3 6
SATA_ODD_PWRGT
4 5 MFG_MODE
10K_8P4R_04
R166 10K_04 CRIT_TEMP_REP#_R
R167 10K_04 mSATA_DET#
R170 200K_04 SATA_ODD_PRSNT#
R540 *1K_04 FDI_OVRVLTG
3V3_RUN
D03 modify
R573 *10K_04 DGPU_PWRGD add R573
DGPU_PWRGD
R429 *10K_04
FDI_OVRVLTG
R356 100K_04
R165 10K_04 MPC_LED_CTRL
C304 *0.1u_10V_X5R_04 H_THRMTRIP#
U19F
EDP_CARD_DET# T7
BMBUSY # / GPIO0 TACH4 / GPIO68
SMI# A42
35 SMI#
TACH1 / GPIO1 TACH5 / GPIO69
H36
DGPU_HPD_INTR#
TACH2 / GPIO6 TACH6 / GPIO70
SCI# E38
35 SCI#
TACH3 / GPIO7 TACH7 / GPIO71
C10
ICC_EN#
43 ICC_EN#
GPIO8
C4
R153 10K_04 EDID_SELECT#
LAN_PHY _PWR_CTRL / GPIO12
HOST_ALERT#1 G2
GPIO15
U2
mSATA_DET#
SATA4GP / GPIO16
DGPU_PWRGD D40
DGPU_PWRGD
TACH0 / GPIO17 PROCPWRGD
T5
BIOS_REC
SCLOCK / GPIO22 THRMTRIP#
HOST_ALERT#2 E8
GPIO24 INIT3_3V#
SB_BLON E16
15 SB_BLON
GPIO27
P8
PLL_ODVR_EN
GPIO28
MPC_LED_CTRL K1
STP_PCI# / GPIO34
K4
PCH_MUTE#
34 PCH_MUTE#
GPIO35
SATA_ODD_PRSNT# V8
SATA2GP / GPIO36
FDI_OVRVLTG M5
SATA3GP / GPIO37
N2
MFG_MODE
SLOAD / GPIO38
GFX_CRB_DET M3
SDATAOUT0 / GPIO39
TEST_SET_UP V13
SDATAOUT1 / GPIO48 VSS_NCTF_15
V3
CRIT_TEMP_REP#_R
SATA5GP / GPIO49 / TEMP_ALERT# VSS_NCTF_16
R366 100K_04 TEST_DET D6
GPIO57 VSS_NCTF_17
VSS_NCTF_18
A4
VSS_NCTF_1 VSS_NCTF_19
A44
VSS_NCTF_2 VSS_NCTF_20
A45
VSS_NCTF_3 VSS_NCTF_21
A46
VSS_NCTF_4 VSS_NCTF_22
A5
VSS_NCTF_5 VSS_NCTF_23
A6
VSS_NCTF_6 VSS_NCTF_24
B3
VSS_NCTF_7 VSS_NCTF_25
B47
VSS_NCTF_8 VSS_NCTF_26
BD1
VSS_NCTF_9 VSS_NCTF_27
BD49
VSS_NCTF_10 VSS_NCTF_28
BE1
VSS_NCTF_11 VSS_NCTF_29
BE49
VSS_NCTF_12 VSS_NCTF_30
BF1
VSS_NCTF_13 VSS_NCTF_31
BF49
VSS_NCTF_14 VSS_NCTF_32
CPT_PPT_Rev _0p5
HIGH LOW
PANEL_SEL_R LVDS eDP
D04
Add R605, and PANEL_SEL_R connect to GPIO69
C40 SATA_ODD_PWRGT
B41 GPIO69 R605 0_04 D03 modify
PANEL_SEL_R 15,23
add C597
C41
R200 100K_04 bug 79
3.3VS
A40
R201 100K_04
3.3VS
H_CPUPWRGD C597
R343 10K_04
3.3VS
P4
GA20 35
A20GATE
R168 *10K_04
1.05VS_VTT
AU16
H_PECI_R R173 *0_04
PECI H_PECI 4,35
R340 10K_04
3.3VS
P5
KBC_RST# 35
RCIN#
AY 11
H_CPUPWRGD 4
AY 10
R368 390_04
H_THRMTRIP# 4
T14 INIT3_3V#
R560 2.2K_04
V_NVRAM_VCCQ
AY 1 NV_CLE R559 1K_04
H_SNB_IVB# 4
DF_TVS
AH8
R350 *10mil_short_04 DMI & FDI Termination Voltage
TS_VSS1
AK11 R363 *10mil_short_04 Set to Vss when LOW
TS_VSS2
NV_CLE
Set to Vcc when HIGH
AH10
R367 *10mil_short_04
TS_VSS3
AK10
R364 *10mil_short_04 PLACE R464 CLOSE TO THE BRANCHING POINT
TS_VSS4
( TO CPT and NVRAM CONNECTOR
P37
NC_1
BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49
26 V_NVRAM_VCCQ
3,4,6,26,27,44,45,48 1.05VS_VTT
3,4,7,15,20,21,22,24,26,27,30,31,33,37,38,41,43,44 3.3V
2,4,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,26,27,29,30,31,33,34,35,36,37,38,41,45,48 3.3VS
14 3V3_RUN
0.01u_16V_X7R_04