Pci Express Configuration; Dmi Link Aspm Control - American Megatrends MI980 User Manual

BIOS SETUP

PCI Express Configuration

Main Advanced
PCI Express Configuration
PCI Express Clock Gating

DMI Link ASPM Control

DMI Link Extended Synch Control
PCIe-USB Glitch W/A
PCIE Root Function Swapping
Subtractive Decode
► PCI Express Root Port 1
► PCI Express Root Port 2
► PCI Express Root Port 3
► PCI Express Root Port 4
► PCI Express Root Port 5
PCI-E Port 6 is assigned to LAN
► PCI Express Root Port 7
► PCI Express Root Port 8
PCI Express Clock Gating
Enable or disable PCI Express Clock Gating for each root port.
DMI Link ASPM Control
The control of Active State Power Management on both NB side and SB
side of the DMI link.
PCIe-USB Glitch W/A
PCIe-USB Glitch W/A for bad USB device(s) connected behind
PCIE/PEG port.
42
Chipset
Boot
Enabled
Enabled
Disabled
Disabled
Disabled
Disabled
MI980 User's Manual
Security Save & Exit
→ ←
Select Screen
↑↓ Select Item
Enter: Select
+- Change Field
F1: General Help
F2: Previous Values
F3: Optimized Default
F4: Save ESC: Exit