Circuit Description - Yaesu FT-817 Technical Supplement

The FT-817/-FT-817 internal assembly consists of the
ND
MAIN Unit, Control ( PANEL) Unit, and the PA Unit. The
MAIN Unit contains the receiver front end, PLL IC, and
switching circuits, as well as the VCO Unit (local oscilla-
tor for transmission and reception). The PANEL Unit con-
tains the CPU and reset circuits, as well as the power
circuitry for the LCD.
Receive Signal Circuitry
High-Frequency Circuit
The receive signal enters from the Front (J1001) or Rear
(J1002) ANT connector , as selected by relay RL3016 on
the PA Unit.
Signals between 0.1 and 154 MHz received at the antenna
terminal pass through an input low-pass filter composed
of L3081, L3082, C3264, and C3265.
Received 430 MHz signals, after passing through a high-
pass filter composed of L3071, L3076, C3245, and C3254
are passed through low-pass filter composed of L3028,
L3032, L3035, C076, C3082, C3088, and C3093, and then
are fed through the directional coupler to the UHF T/R
switch circuit composed of diode switch D3004/D3035
(both HSU277). The signal then is fed to MAIN Unit via
J3002.
Received 145 MHz signals, after passing through a high-
pass filter composed of L3071, L3075, L3079, C3234, C3245,
C3252, and C3260 are passed through low-pass filter com-
posed of L3027, L3031, L3034, C3075, C3081, and C3092,
and then are fed through the directional coupler to the
VHF T/R switch circuit, composed of diode switch D3003/
D3005 (both HSU277). The signal then is fed to MAIN
Unit via J3002.
Received 0.1-54 MHz signals, after passing through the
first low-pass filter, are passed through another low-pass
filter composed of L3069, L3070, L3074, L3077, C3239,
C3242, and C3248, plus LPFs 1-7 (5th or 7th-order
Chebyschev type filter) and HPFs 1-7, utilizing seven dif-
ferent sections to create optimized bandpass responses
for the various amateur bands at 0.1-54 MHz. The signal
then is fed to the 50MHz pre-amplifier (when engaged)
and on to the MAIN Unit via J3002.
The receive signal then passes through the input attenua-
tor (-10dB) which consists of resistors R1001, R1014, and
R1015 plus diodes D1003/D1011 (both DAP236U) on the
MAIN Unit.

Circuit Description

Incoming wideband FM (76-108 MHz) signals, after pass-
ing through a high-pass filter composed of L3071, L3075,
L3079, C3234, C3245, C3252, and C3260 are passed
through a low-pass filter composed of L3027, L3031,
L3034, C3075, C3081, and C3092, and through a directional
coupler, to the VHF T/R switch circuit, composed of di-
ode switch D3003/D3005 (both HSU277). Then it is fed to
the MAIN Unit via J3002. The signal is delivered to IC
Q1025 (CXA1611N) which contains the front-end and dis-
criminator circuits for Wide-FM demodulation. Then the
audio signal is passed to analog switch IC Q1049
(BU4066BF).
The FT-817/-FT-817 includes four receiver front ends,
ND
each optimized for a particular frequency range and mode
combination.
1st Mixer Circuit/1st IF Circuit
The 1st mixer on the MAIN Unit consists of a quad MES
FET, D1047 (GN2011). The 1st local signal (68.430-538.330
MHz) from the PLL Unit is applied to the gates of each
FET in the 1st mixer.
The resulting output signal (the difference between the
local signal and receive signal) passes through a mono-
lithic crystal filter (MCF) XF1001 (MF68R, BW:±7.5 kHz)
to obtain the 1st IF signal having a center frequency of
68.33 MHz. The signal is then fed to the 2nd mixer circuit
on the MAIN Unit after it is amplified by FET Q1051
(BB304C).
2nd Mixer Circuit/2nd IF Circuit
The 2nd mixer consists of FETs Q1060 and Q1062 (both
2SK302Y) on the MAIN Unit. The 2nd local signal (67.875
MHz) is amplified by Q1047 (2SC4400) and is applied to
each FET's gate in the 2nd mixer.
The signal output from the 2nd mixer passes through a
ceramic filter, or optional mechanical filter (U1003), to
become the 455-kHz 3rd IF signal.
Noise Blanker Circuit
A sample of the 2nd IF circuit is amplified by FETs Q1052
and Q1061 (both BB301C) on the MAIN Unit, and then
is rectified by D1068 (1SS372). The resulting DC voltage
passes through R1343 and R1345, C1360 and C1362, and
Q1076 (2SC4154E) to yield an average AGC voltage for
controlling the amplification gain of the above FETs. Noise
pulses contained in the output from D1075 (DAP222) are
detected by Q1074 (2SC4154E) and are used to control
the NB Gate.
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