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Inrevium TB-6V-LX760-LSI Hardware User Manual

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TB-6V-LX760-LSI Hardware User Manual
TB-6V-LX760-LSI
Hardware User Manual
Rev.3.00
1
Rev.3.00

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Summary of Contents for Inrevium TB-6V-LX760-LSI

  • Page 1 TB-6V-LX760-LSI Hardware User Manual TB-6V-LX760-LSI Hardware User Manual Rev.3.00 Rev.3.00...
  • Page 2 TB-6V-LX760-LSI Hardware User Manual Revision History Version Date Description Publisher Rev.1.xx 2009/xx/xx Preliminary Rev.2.00 2010/05/06 Initial release Odajima Rev.2.01 2010/06/25 -Added J66, J53 to figure 12-1 Yoshioka -Modified table 12-1 Added J66,J53 Separate SW5,SW6 Changed initial settings : No1, 6 ,7 ,18, 20.21 Rev.2.02...

  • Page 3: Table Of Contents

    6.2. TB-FMCH-STACK Board Structure ..................14 6.3. TB-FMCH-CONNECTER Board Structure ................15 6.4. Layout of TB-6V-LX760-LSI Board Components ..............16 6.5. Layout of the TB-FMCH-STACK Board Components ............. 17 6.6. Layout of the TB-FMCH-CONNECTER Board Components ..........17 Description of Components ....................... 18 7.1.
  • Page 4 Figure5-1 Component Side ......................12 Figure5-3 External view of the TB-FMCH-STACK and TB-FMCH-CONNECTOR ......13 Figure6-1 Layout of TB-6V-LX760-LSI Board Components ............. 16 Figure6-2 Layout of the TB-FMCH-STACK Board Components ............17 Figure6-3 Layout of the TB-FMCH-CONNECTER Board Components........... 17 Figure7-1 DDR3 Peripheral Connections..................
  • Page 5 TB-6V-LX760-LSI Hardware User Manual List of Tables Table6-1 TB-6V-LX760-LSI Board Structure ..................14 Table6-2 TB-FMCH-STACK Board Structure ................... 14 Table6-3 TB-FMCH-CONNECTER Board Structure ................ 15 Table8-1 FMC1 Connector Pinouts on Component and Solder Sides ..........23 Table8-2 FMC2 Connector Pinouts on Component and Solder Sides ..........25 Table8-3 FMC3 Connector Pinouts on Component and Solder Sides ..........
  • Page 6 TB-6V-LX760-LSI Hardware User Manual Introduction Thank you for purchasing the TB-6V-LX760-LSI board. Before using the product, be sure to carefully read this user manual and fully understand how to correctly use the product. First read through this manual, and then always keep it handy.
  • Page 7 TB-6V-LX760-LSI Hardware User Manual Warning In the event of a failure, disconnect the power supply. If the product is used as is, a fire or electric shock may occur. Disconnect the power supply immediately and contact technical support. If an unpleasant smell or smoking occurs, disconnect the power supply.
  • Page 8 TB-6V-LX760-LSI Hardware User Manual Caution Do not use or place the product in the following locations.  Humid and dusty locations  Airless locations such as closet or bookshelf  Locations which receive oily smoke or steam  Locations exposed to direct sunlight ...

  • Page 9: Related Documents And Accessories

    “Welcome latter” on the products. Board accessories: FMC spacer set 2. Overview This document describes the design specification of the TB-6V-LX760-LSI board. The design covers the TB-6V-LX760-LSI board and two FMC option boards (TB-FMCH-STACK and TB-FMCH-CONNECTOR). 3. Feature FPGA Devices : XC6VLX760-2FFG1760...
  • Page 10 TB-6V-LX760-LSI Hardware User Manual Power Supply: The +12 volt power supply can be derived either from the Molex 39-29-1048 connector or from the 39-30-0060. A dedicated power supply is attached. Onboard power supply module: Various Linear modules (LTM4601A, LTM4606, LTM8025 etc.)

  • Page 11: Block Diagram

    TB-6V-LX760-LSI Hardware User Manual 4. Block Diagram The following figure represents the block diagram of the TB-6V-LX760-LSI and illustrates the assignment of various blocks and connectors to IO banks on the FPGA. Figure4-1 Block Diagram Rev.3.00...

  • Page 12: External View Of The Board

    TB-6V-LX760-LSI Hardware User Manual 5. External View of the Board 5.1. TB-6V-LX760-LSI Figure5-1 Component Side F M C C o n n ec t o r6 F M C C o n ne c to r7 F M C C o nn e c to r8...

  • Page 13: Tb-Fmch-Stack And Tb-Fmch-Connector

    TB-6V-LX760-LSI Hardware User Manual 5.2. TB-FMCH-STACK and TB-FMCH-CONNECTOR The TB-FMCH-STACK and the TB-FMCH-CONNECTOR permit the interconnection of multiple TB-6V-LX760T-LSI boards in either a horizontal or vertical configuration. TB-FMCH-Connector Solder side Figure5-3 External view of the TB-FMCH-STACK and TB-FMCH-CONNECTOR Rev.3.00...

  • Page 14: Board Specifications

    TB-6V-LX760-LSI Hardware User Manual 6. Board Specifications 6.1. TB-6V-LX760-LSI Board Structure The following table shows the board structure and the specifications. For details about connector locations, refer to the board layout drawing. For details about clock structure and operational frequency, refer to the clock system diagram.

  • Page 15: Tb-Fmch-Connecter Board Structure

    TB-6V-LX760-LSI Hardware User Manual 6.3. TB-FMCH-CONNECTER Board Structure The following table shows the board structure and the specifications. For details about connector locations, refer to the board layout drawing. Table6-3 TB-FMCH-CONNECTER Board Structure Item Category-I Category-II Specification Remarks Number of Layers...

  • Page 16: Layout Of Tb-6V-Lx760-Lsi Board Components

    TB-6V-LX760-LSI Hardware User Manual 6.4. Layout of TB-6V-LX760-LSI Board Components The following figure shows the dimensions of the TB-6V-LX760-LSI. 112.5 Unit : mm 15.5 12.5 ATX CN ATX CN 15.5 $ 6.0 $ 2.7 DC-DC DC-DC Regulato Regulato DC-DC DC-DC DC-DC Regulato Regulato Regulato...

  • Page 17: Layout Of The Tb-Fmch-Stack Board Components

    TB-6V-LX760-LSI Hardware User Manual 6.5. Layout of the TB-FMCH-STACK Board Components The following figure shows the dimensions of the TB-FMCH-STACK board and locations of its connectors. Figure6-2 Layout of the TB-FMCH-STACK Board Components 6.6. Layout of the TB-FMCH-CONNECTER Board Components The following figure shows the dimensions of the TB-FMCH-CONNECTER board and locations of its connectors.

  • Page 18: Description Of Components

    7. Description of Components 7.1. DDR3 SDRAM The TB-6V-LX760-LSI board has four DDR3 SDRAM chips. Device: MT41J64M16LA-15E:B (Micron) 1-Gbit (8Meg x 16bit x 8Bank) x 4 or equivalents The DDR3 memory device can be divided into two groups as shown in following figure.

  • Page 19: Spi Flash

    TB-6V-LX760-LSI Hardware User Manual 7.2. SPI FLASH The TB-6V-LX760-LSI board has one SPI Flash memory device. Device: M25P64-VMF6TP (Numonyx) 64-MBit Figure7-2 SPI Flash Peripheral Connections 7.3. BPI FLASH The TB-6V-LX760-LSI board has one BPI Flash memory device. Device: JS28F256P30TF (Numonyx) 256-MBit Figure7-3 BPI Flash Peripheral Connections Rev.3.00...

  • Page 20: Microsd/Nand Flash (These Are Only For Virtex-6 Configuration)

    7.4. MicroSD/NAND FLASH (these are only for Virtex-6 configuration) The TB-6V-LX760-LSI board has one NAND Flash for storing Virtex-6 configuration files and one MicroSD socket. The Spartan-3AN reads the data stored in the Micro SD/NAND Flash memory device to configure the Virtex-6 device.

  • Page 21: Interfaces

    TB-6V-LX760-LSI Hardware User Manual 8. Interfaces 8.1. USB and I2C USB Connector Type B: 67068-8000 USB PHY: CY7C68013A-56PVXC I2C Connector Pin Header: A2-2PA-2.54DSA Figure8-1 USB and I2C Peripheral Connections 8.2. Method of Rewriting an EEPROM for USB PHY Free software “EzMr.exe” is available from Cypress Semiconductor Corporation for rewriting the CY7C68013 EEPROM.

  • Page 22: Fmc Connector

    8.3. FMC Connector The TB-6V-LX760-LSI board has 10 FMC LPC connectors (Carrier type) on its component side and 10 FMC LPC connectors (Module type) on its solder side. The following figure shows the FPGA to FMC connections. For details about FPGA pinouts, refer to the board circuit diagram. A Microsoft Excel spreadsheet document, defining the pinouts, is also available as a published reference.

  • Page 23: Fmc1 Lpc Mc / Cc Connector

    TB-6V-LX760-LSI Hardware User Manual 8.3.1. FMC1 LPC MC / CC Connector The FMC connector (J43/J67) is interfaced to the FPGA over 36 pairs of signal pins. Of them, 1 pair is assigned to the GC pin and 1 pair is assigned to the MRCC pins of the FPGA. Also, LA33_P and LA33_N is not FPGA deferential signal pair pin.
  • Page 24 TB-6V-LX760-LSI Hardware User Manual Bank No. Pin No. Pin No. Bank No. *5 VREF_A_M2C CLK1_M2C_P *6 PRSNT_M2C_L CLK1_M2C_N CLK0_M2C_P CLK0_M2C_N LA00_P_CC LA00_N_CC LA02_P LA02_N LA03_P LA03_N LA04_P LA04_N LA08_P LA08_N LA07_P LA07_N LA12_P LA12_N LA11_P LA11_N LA16_P LA16_N LA15_P LA15_N...

  • Page 25: Fmc2 Lpc Mc / Cc Connector

    TB-6V-LX760-LSI Hardware User Manual 8.3.2. FMC2 LPC MC / CC Connector The FMC connector (J44/J68) is interfaced to the FPGA over 36 pairs of signal pins. Of them, 2 pairs are assigned to the MRCC pins of the FPGA. Also, LA33_P and LA33_N is not FPGA deferential signal pair pin.
  • Page 26 TB-6V-LX760-LSI Hardware User Manual Bank No. Pin No. Pin No. Bank No. *5 VREF_A_M2C CLK1_M2C_P *6 PRSNT_M2C_L CLK1_M2C_N CLK0_M2C_P CLK0_M2C_N LA00_P_CC LA00_N_CC LA02_P LA02_N LA03_P LA03_N LA04_P LA04_N LA08_P LA08_N LA07_P LA07_N LA12_P LA12_N LA11_P LA11_N LA16_P LA16_N LA15_P LA15_N...

  • Page 27: Fmc3 Lpc Mc / Cc Connector

    TB-6V-LX760-LSI Hardware User Manual 8.3.3. FMC3 LPC MC / CC Connector The FMC connector (J45/J69) is interfaced to the FPGA over 36 pairs of signal pins. Of them, 2 pairs are assigned to the MRCC pins of the FPGA. The following table shows the pin mapping assignments between the FMC connector and the FPGA.
  • Page 28 TB-6V-LX760-LSI Hardware User Manual Bank No. Pin No. Pin No. Bank No. *5 VREF_A_M2C CLK1_M2C_P *6 PRSNT_M2C_L AB42 CLK1_M2C_N CLK0_M2C_P AB37 CLK0_M2C_N AA37 AC38 LA00_P_CC AC39 LA00_N_CC LA02_P AB39 LA02_N AB38 AA39 LA03_P LA03_N LA04_P AD42 LA04_N AC41 LA08_P LA08_N...

  • Page 29: Fmc4 Lpc Mc / Cc Connector

    TB-6V-LX760-LSI Hardware User Manual 8.3.4. FMC4 LPC MC / CC Connector The FMC connector (J46/J70) is interfaced to the FPGA over 36 pairs of signal pins. Of them, 2 pairs are assigned to the MRCC pins of the FPGA. The following table shows the pin mapping assignments between the FMC connector and the FPGA.
  • Page 30 TB-6V-LX760-LSI Hardware User Manual Bank No. Pin No. Pin No. Bank No. *5 VREF_A_M2C AK37 CLK1_M2C_P *6 PRSNT_M2C_L AU41 AJ36 CLK1_M2C_N CLK0_M2C_P AF36 CLK0_M2C_N AF37 AG32 LA00_P_CC AG37 LA00_N_CC LA02_P AN39 LA02_N AP40 AE33 LA03_P AE32 LA03_N LA04_P AM39 LA04_N...

  • Page 31: Fmc5 Lpc Mc / Cc Connector

    TB-6V-LX760-LSI Hardware User Manual 8.3.5. FMC5 LPC MC / CC Connector The FMC connector (J47/J71) is interfaced to the FPGA over 36 pairs of signals pins. Of them, 2 pairs are assigned to the MRCC pins of the FPGA. The following table shows the pin mapping assignments between the FMC connector and the FPGA.
  • Page 32 TB-6V-LX760-LSI Hardware User Manual Bank No. Pin No. Pin No. Bank No. *5 VREF_A_M2C AW32 CLK1_M2C_P *6 PRSNT_M2C_L AN28 AW33 CLK1_M2C_N CLK0_M2C_P AU36 CLK0_M2C_N AU37 AW36 LA00_P_CC AV35 LA00_N_CC LA02_P AV33 LA02_N AU32 AV34 LA03_P AU34 LA03_N LA04_P BA34 LA04_N...

  • Page 33: Fmc6 Lpc Mc / Cc Connector

    TB-6V-LX760-LSI Hardware User Manual 8.3.6. FMC6 LPC MC / CC Connector The FMC connector (J48/J72) is interfaced to the FPGA over 38 pairs of signal pins. Of them, 2 pairs are assigned to the MRCC pins of the FPGA. Also, LA33_P and LA33_N is not FPGA deferential signal pair pin.
  • Page 34 TB-6V-LX760-LSI Hardware User Manual Bank No. Pin No. Pin No. Bank No. *5 VREF_A_M2C CLK1_M2C_P *6 PRSNT_M2C_L CLK1_M2C_N CLK0_M2C_P CLK0_M2C_N LA00_P_CC LA00_N_CC LA02_P LA02_N LA03_P LA03_N LA04_P LA04_N LA08_P LA08_N LA07_P LA07_N LA12_P LA12_N LA11_P LA11_N LA16_P LA16_N LA15_P LA15_N...

  • Page 35: Fmc7 Lpc Mc / Cc Connector

    TB-6V-LX760-LSI Hardware User Manual 8.3.7. FMC7 LPC MC / CC Connector The FMC connector (J49/J73) is interfaced to the FPGA over 36 pairs of signal pins. Of them, 2 pairs are assigned to the MRCC pins of the FPGA. Also, LA33_P and LA33_N is not FPGA deferential signal pair pin.
  • Page 36 TB-6V-LX760-LSI Hardware User Manual Bank No. Pin No. Pin No. Bank No. *5 VREF_A_M2C CLK1_M2C_P *6 PRSNT_M2C_L CLK1_M2C_N CLK0_M2C_P CLK0_M2C_N LA00_P_CC LA00_N_CC LA02_P LA02_N LA03_P LA03_N LA04_P LA04_N LA08_P LA08_N LA07_P LA07_N LA12_P LA12_N LA11_P LA11_N LA16_P LA16_N LA15_P LA15_N...

  • Page 37: Fmc8 Lpc Mc / Cc Connector

    TB-6V-LX760-LSI Hardware User Manual 8.3.8. FMC8 LPC MC / CC Connector The FMC connector (J50/J74) is interfaced to the FPGA over 36 pairs of signal pins. Of them, 1 pair is assigned to the GCLK pins and 1 pair is assigned to the MRCC pin of FPGA. The following table shows the pin mapping assignments between the FMC connector and the FPGA.
  • Page 38 TB-6V-LX760-LSI Hardware User Manual Bank No. Pin No. Pin No. Bank No. *5 VREF_A_M2C CLK1_M2C_P *6 PRSNT_M2C_L CLK1_M2C_N CLK0_M2C_P CLK0_M2C_N LA00_P_CC LA00_N_CC LA02_P LA02_N LA03_P LA03_N LA04_P LA04_N LA08_P LA08_N LA07_P LA07_N LA12_P LA12_N LA11_P LA11_N LA16_P LA16_N LA15_P LA15_N...

  • Page 39: Fmc9 Lpc Mc / Cc Connector

    TB-6V-LX760-LSI Hardware User Manual 8.3.9. FMC9 LPC MC / CC Connector The FMC connector (J51/J75) is interfaced to the FPGA over 36 pairs of signal pins. Of them, 2 pairs are assigned to the MRCC pins of the FPGA. The following table shows the pin mapping assignments between the FMC connector and the FPGA.
  • Page 40 TB-6V-LX760-LSI Hardware User Manual Bank No. Pin No. Pin No. Bank No. *5 VREF_A_M2C CLK1_M2C_P *6 PRSNT_M2C_L CLK1_M2C_N CLK0_M2C_P CLK0_M2C_N LA00_P_CC LA00_N_CC LA02_P LA02_N LA03_P LA03_N LA04_P LA04_N LA08_P LA08_N LA07_P LA07_N LA12_P LA12_N LA11_P LA11_N LA16_P LA16_N LA15_P LA15_N...

  • Page 41: Fmc10 Lpc Mc / Cc Connector

    TB-6V-LX760-LSI Hardware User Manual 8.3.10. FMC10 LPC MC / CC Connector The FMC connector (J52/J76) is interfaced to the FPGA over 36 pairs of signal pins. Of them, 2 pairs are assigned to the MRCC pins of the FPGA. Following table shows the pin mapping assignments between the FMC connector and the FPGA.
  • Page 42 TB-6V-LX760-LSI Hardware User Manual Bank No. Pin No. Pin No. Bank No. *5 VREF_A_M2C CLK1_M2C_P *6 PRSNT_M2C_L AH10 CLK1_M2C_N CLK0_M2C_P CLK0_M2C_N LA00_P_CC LA00_N_CC LA02_P LA02_N LA03_P LA03_N LA04_P LA04_N LA08_P LA08_N LA07_P LA07_N LA12_P LA12_N LA11_P LA11_N LA16_P LA16_N LA15_P...

  • Page 43: Figure8-4 Sda,Scl,Ga1/0 Tdi/Tdo Circuit

    TB-6V-LX760-LSI Hardware User Manual *1 SCL/SDA This has a test pad to perform the I2C communication with the FMC mezzanine card. *2 GA[1:0] This has a test pad to perform the ID notification function to the FMC mezzanine card. *3 TDI/TDO/TCK/TMS/TRST_L These have an onboard loopback function to enable JTAG communication from the FMC mezzanine card.

  • Page 44: Figure8-7 Fmc_Vref Select Circuit

    TB-6V-LX760-LSI Hardware User Manual This connects the “H1” pin of the FMC1 and 2 connectors to the FMC_VREFA and the “H1” pin of the FMC6 and 7 connectors to the FMC_VREFB. The following VREF circuit is enabled with J23 and J24 settings.

  • Page 45: Clock System Diagram

    TB-6V-LX760-LSI Hardware User Manual 9. Clock System Diagram The following figure shows the clock system diagram of the TB-6V-LX760-LSI board. OSC  V6_CLK266M_P Sparten3AN OSC 50MHz V6_CCLK CLK50M 266.67MHz [XC3S700AN- CCLK [KC3225A50. [NBXSBB021 V6_CLK266M_N 0000C3] FG484] LN1TAG] V6_USB_IFCLK MRCC CY7C68013 24MHz V6_USB_CLK...

  • Page 46: Pll Setting

    TB-6V-LX760-LSI Hardware User Manual 9.1. PLL Setting The output clock frequency of an onboard PLL can be calculated using the following formula. Fout is the output clock frequency in the range of 20.83MHz-500MHz, and Fxtal is the input clock frequency in the range of 14MHz-27MHz.

  • Page 47: Table9-2 Pll's N Divide Setting Table

    TB-6V-LX760-LSI Hardware User Manual Table9-2 PLL’s N Divide Setting Table Inputs Output Frequency(MHz) SW19-4 SW19-3 SW19-2 N Divider Value Minimum Maximum 166.66 333.33 83.33 166.66 62.5 41.66 83.33 31.25 62.5 20.83 41.66 Rev.3.00...

  • Page 48: Power Supply System

    TB-6V-LX760-LSI Hardware User Manual Power Supply System 10.1. Power Consumption Estimation The following is the power consumption estimation of the main components: XC6VLX760-2FFG1760C Vccint 1.0V 29.5W Vccaux 2.5V 7.5W Vcco2.5 2.5V 10.5W Vcco1.5 1.5V 2.5W XC3S700AN-4FGG484C Vccint 1.2V 0.6W Vccaux 3.3V 0.66W...

  • Page 49: Power Supply System Diagram

    TB-6V-LX760-LSI Hardware User Manual 10.2. Power Supply System Diagram Power Supply: ATX12V Power Supply Connector: Molex 39-29-1048 or 39-30-0060 connector The following figure shows the power supply system diagram. ATX CN 39-30-0060 12A(MAX) 36A(MAX) DC-DC To Vint of Virtex6 FPGA  BNX023-01 LTM4601A V6_VINT is about 29.5A Use rate 81.94% FUSE 12.0V -> 1.0V...

  • Page 50: Power Supply Monitor

    TB-6V-LX760-LSI Hardware User Manual 10.3. Power Supply Monitor The board has a Linear Technology’s LTC2978CUP to monitor the onboard power sources such as Core voltage, AUX voltage and VCCO (2.5V/1.5V) that use Virtex-6. The monitor information can be displayed on your PC through the onboard CN29 connector and the Linear Technology’s USB conversion board.

  • Page 51: Power Supply Arrangement For Fpga Banks

    TB-6V-LX760-LSI Hardware User Manual 10.4. Power Supply Arrangement for FPGA Banks Figure 6-3 shows the arrangement of the power supplies for Virtex-V6 FPGA Banks that are mounted on the TB-6V-LX760-LSI board. 0VCCO0 VccoVar +1.2V or +1.5V or +1.8V VccoVar or +2.5V VccoVar or +2.5V +2.5V +2.5V +1.5V +1.5V...

  • Page 52: Led/Sw/Jumper

    TB-6V-LX760-LSI Hardware User Manual LED/SW/JUMPER 11.1. LED The following table describes the function of the onboard LEDs. Table11-1 LED Functions LED Name Function Remarks D1 (Green) Lights when +12V input power is ON. D103(Green) Lights when Virtex6_VINT (+1.0V) is OK.

  • Page 53: Switch

    TB-6V-LX760-LSI Hardware User Manual 11.2. Switch The following table shows the destination of the onboard switch to be connected and its function. Table11-2 Switch Functions DIP_SW Destination Pin Switch Name Function Destination Pin Order Function V6_M0 V6 FPGA/ Slide Switch...

  • Page 54: Jumper

    TB-6V-LX760-LSI Hardware User Manual 11.3. JUMPER The following figure shows the onboard jumper functions. Table11-3 Jumper Functions Jumper Name Function Remarks 1: Pull-up J41, J42 NC/pull-up/pull-down setting for Monitor ASEL[1:0] pin 2: ASEL0/1 3: Pull-down 1,2: FP_OP_A VCCO_A power supply selection for Virtex-6 FPGA 3,4: V6_VCCO_A 5,6: 2.5V...

  • Page 55: Pin Header

    TB-6V-LX760-LSI Hardware User Manual 11.4. Pin Header This pin header is used for general purpose. The connector is HIROSE A1-34PA-2.54DSA. Table11-4 Pin assign of Pin header Pin Number Pin Name Pin Number Pin Name +2.5V +2.5V V6_TP0 V6_TP15 V6_TP1 V6_TP16...

  • Page 56: Initial Settings

    TB-6V-LX760-LSI Hardware User Manual Initial Settings The following figure shows the Initial switch settings. Look at the switches surrounded by a blue box. Figure12-1 Default Settings (component side) Rev.3.00...

  • Page 57: Table12-1 Initial Settings

    TB-6V-LX760-LSI Hardware User Manual The following table shows the initial settings. Table12-1 Initial Settings Default Silk No. Function Setting J41, J42 Address setting for voltage monitoring SHORT Use for rewriting to EEPROM of USB-Chip 3-5; 4-6 VCCO setting for Virtex6 Bank16/17/25/26 ( / FP_OP_A / None) 2.5V...
  • Page 58 TB-6V-LX760-LSI Hardware User Manual PLD Solution Dept. PLD Division URL: http://solutions.inrevium.com/ E-mail: psd-support@teldevice.co.jp HEAD Quarter: Yokohama East Square, 1-4 Kinko-cho, Kanagawa-ku, Yokohama City, Kanagawa, Japan 221-0056 TEL: +81-45-443-4016 FAX: +81-45-443-4058 Rev.3.00...

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