Table of Contents
Advertisement
A
X
4
P
E
/
A
X
4
P
E
A
X
4
P
E
/
A
X
4
P
E
D
M
A
(
D
i
r
e
c
t
M
e
m
o
D
M
A
(
D
i
r
e
c
t
M
e
m
o
Channel for communications between the memory and surrounding devices.
E
C
C
(
E
r
r
o
r
C
h
e
c
k
i
E
C
C
(
E
r
r
o
r
C
h
e
c
k
i
The ECC mode needs 8 ECC bits for 64-bit data. Each time memory is accessed; ECC bits are updated and checked by a special
algorithm. The ECC algorithm has the ability to detect double-bit error and automatically correct single-bit error while parity mode can only
detect single-bit error.
E
D
O
(
E
x
t
e
n
d
e
d
D
a
E
D
O
(
E
x
t
e
n
d
e
d
D
a
The EDO DRAM technology is actually very similar to FPM (Fast Page Mode). Unlike traditional FPM that tri-states the memory output data
to start the pre-charge activity, EDO DRAM holds the memory data valid until the next memory access cycle, that is similar to pipeline effect
and reduces one clock state.
E
E
E
E
P
P
R
R
O
O
M
M
(
(
E
E
l
l
e
e
c
c
t
t
r
r
o
o
n
n
2
Also known as E
PROM. Both EEPROM and
different. Size of EEPROM is much smaller than flash ROM.
E
E
P
P
R
R
O
O
M
M
(
(
E
E
r
r
a
a
s
s
a
a
b
b
l
l
e
e
Traditional motherboard stores BIOS code in EPROM. EPROM can only be erased by ultra-violet (UV) light. If BIOS has to be upgraded,
you need to remove EPROM from motherboard, clear by UV light, re-program, and then insert back.
-
N
-
N
r
y
A
c
c
e
s
s
)
r
y
A
c
c
e
s
s
)
n
g
a
n
d
C
o
r
r
e
c
t
i
o
n
)
n
g
a
n
d
C
o
r
r
e
c
t
i
o
n
)
t
a
O
u
t
p
u
t
)
M
e
m
o
r
y
t
a
O
u
t
p
u
t
)
M
e
m
o
r
y
i
i
c
c
E
E
r
r
a
a
s
s
a
a
b
b
l
l
e
e
P
P
r
r
o
o
g
g
r
r
a
a
Flash ROM
P
P
r
r
o
o
g
g
r
r
a
a
m
m
m
m
a
a
b
b
l
l
e
e
R
R
O
O
m
m
m
m
a
a
b
b
l
l
e
e
R
R
O
O
M
M
)
)
can be re-programmed by electronic signals, but the interface technology is
M
M
)
)
99
O
n
l
i
n
e
M
a
n
u
a
l
O
n
l
i
n
e
M
a
n
u
a
l
Advertisement
Table of Contents
