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A
K
7
7
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l
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/
A
K
A
K
7
7
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A
K
P
B
S
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P
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p
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P
B
S
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A
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P
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e
For Socket 7 CPU, one burst data read requires four QWord (Quad-word, 4x16 = 64 bits). PBSRAM only needs one address
decoding time and automatically sends the remaining QWords to CPU according to a predefined sequence. Normally, it is 3-1-1-1,
total 6 clocks, which is faster than asynchronous SRAM. PBSRAM is often used on L2 (level 2) cache of Socket 7 CPU. Slot 1 and
Socket 370 CPU do not need PBSRAM.
P
P
C
C
-
-
1
1
0
0
0
0
D
D
I
I
M
M
M
M
SDRAM
DIMM that supports 100MHz CPU
P
C
-
1
3
3
D
I
M
M
P
C
-
1
3
3
D
I
M
M
SDRAM
DIMM that supports 133MHz CPU
P
P
C
C
-
-
1
1
6
6
0
0
0
0
o
o
r
r
P
P
C
C
-
-
2
2
1
1
Based on FSB frequency, the DDR SDRAM has 200MHz and 266MHz two type of working frequency. Because of DDR SDRAM
data bus is 64-bit, it provides data transfer bandwidth up to 200x64/8=1600MB/s, and 266x64/8=2100MB/s. Hence, the PC-1600
DDR SDRAM is working with 100MHz and PC-2100 DDR SDRAM is working with 133MHz FSB frequency.
P
C
I
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P
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C
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P
C
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p
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C
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Bus for the internal connection of peripheral devices, high-speed data channel between the computer and expansion card.
7
7
P
r
o
7
7
P
r
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d
B
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s
t
S
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A
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)
d
B
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s
t
S
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A
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)
FSB
bus clock.
FSB
bus clock.
0
0
0
0
D
D
D
D
R
R
S
S
D
D
R
R
A
A
M
M
m
p
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n
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t
I
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)
B
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)
B
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97
O
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M
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O
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M
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