Abit KD7-B User Manual page 55

Kd7 series socket 462 system board
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BIOS Setup
Current FSB Frequency:
This item will show you the current system front side bus speed.
Current DRAM Frequency:
This item will show you the current DRAM bus speed.
DRAM Clock:
This item sets the DRAM clock of your DRAM module. The system may be unstable or unable to boot up
if your DRAM module does not support the clock you set.
When set to [By SPD], the BIOS will read the DRAM module SPD data and automatically set the DRAM
clock by the value stored in it.
NOTE: This item will be unchangeable at 333MHz FSB.
DRAM Timing Selectable:
Four options are available: Manual
set to "By SPD", the BIOS will read the DRAM module SPD data and automatically set to the values
stored in it. If you set to "Manual", the following five items will be available to let you make
adjustments.
CAS Latency Time:
Four options are available: 1.5
(Column Address Strobe) latency time according your SDRAM specification.
Bank Interleave:
Three options are available: Disabled
on your SDRAM module structure, the 4-Way setting can offer the best performance. If you choose the
wrong setting, the computer system will not run in a stable manner. For detailed information on your
SDRAM module, please ask your SDRAM module manufacturer.
By SPD
Turbo
2
2.5
3. The default setting is 2.5. You can select SDRAM CAS
2 Bank
4 Bank. The default setting is Disabled. Depending
Ultra. The default setting is By SPD. When
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