Intel D850MVSE Specification page 22

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Intel Desktop Board D850MV Specification Update
Table 17. Interrupts (continued)
IRQ System Resource
17
AC' 97 Audio/User Available (through PIRQB)
18
User available (through PIRQC)
19
Intel
20
Intel ICH2 LAN (optional) (through PIRQE)
21
OHCI Controller #2/User available (through PIRQF)
22
EHCI Controller #1/User available (through PIRQG)
23
Intel ICH2 USB Controller #2/ User Available (through PIRQH)
Note 1: Default, but can be changed to another IRQ.
Note 2: Available in APIC mode only.
2. Change to Description of Section 2.7, PCI Interrupt Routing Map
Section 2.7, PCI Interrupt Routing Map, will change in its entirety as follows:
2.7 PCI Interrupt Routing Map
This section describes interrupt sharing and how the interrupt signals are connected between the PCI bus
connectors and onboard PCI devices. The PCI specification specifies how interrupts can be shared between
devices attached to the PCI bus. In most cases, the small amount of latency added by interrupt sharing does
not affect the operation or throughput of the devices. In some special cases where maximum performance is
needed from a device, a PCI device should not share an interrupt with other PCI devices. Use the following
information to avoid sharing an interrupt with a PCI add-in card.
PCI devices are categorized as follows to specify their interrupt grouping:
•
INTA: By default, all add-in cards that require only one interrupt are in
this category. For almost all cards that require more than one interrupt,
the first interrupt on the card is also classified as INTA.
•
INTB: Generally, the second interrupt on add-in cards that require two
or more interrupts is classified as INTB. (This is not an absolute
requirement.)
•
INTC and INTD: Generally, a third interrupt on add-in cards is
classified as INTC and a fourth interrupt is classified as INTD.
The Intel ICH2 has eight programmable interrupt request (PIRQ) input signals. All PCI interrupt sources
either onboard or from a PCI add-in card connect to one of these PIRQ signals. Some PCI interrupt sources
are electrically tied together on the D850MD and D850MV boards and therefore share the same interrupt.
Table 18 shows an example of how the PIRQ signals are routed on the D850MD and D850MV boards.
16
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ICH2 USB Controller #1 (through PIRQD)
(Note 2)
(Note 2)
(Note 2)
(Note 2)
(Note 2)
(Note 2)
(Note 2)