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Advanced Chipset Features > SDRAM RAS Precharge Time
Advanced Chipset Features > Video BIOS Cacheable
Advanced Chipset Features > Memory Hole At 15M-16M
The RAS Precharge means the timing to inactive RAS and
the timing for DRAM to do precharge before next RAS can
be issued. RAS is the address latch control signal of DRAM
row address. The default setting is 3 clocks.
Allows the video BIOS to be cached to allow faster video
performance.
This option lets you reserve system memory area for
special I/O cards. The chipset accesses code/data of these
areas from the I/O bus directly. Normally, these areas are
reserved for memory mapped I/O card.
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