Solid State Logic XLogic Super-Analogue Owner's Manual page 18

XLogic Channel ADC Owner's Manual
Appendix C – Performance Specification
Following are audio performance specification figures for the XLogic Channel ADC card, when fitted
to an XLogic Channel unit. No other Solid State Logic products, including the XLogic Channel unit
with which this card operates, are covered by this document and the performance of other Solid State
Logic products can not be inferred from the data contained herein.
Measurement Conditions
For all of these measurements, signal for the left hand channel is applied via PL5 and for the right hand
channel via SK1. Measurements are taken from the AES output. For all measurements the gain of the
ADC card is set at +24dBu ≈ 0dB FS.
Measurement References
Unless otherwise specified the references used in this specification are as follows:
• Reference frequency:
• Reference level:
• Source impedance of Test Set:
• Unweighted measurements are specified as 22Hz to 22kHz band limited RMS and are expressed
in units of dB FS
• All distortion measurements are bandwidth limited in the digital domain at no more than half the
sample frequency specified and are expressed as a percentage
• Jitter is quoted in terms of 'Unit Interval' where 1 UI = Sample Period/128 (ref. AES-3-1995)
• Unless otherwise quoted all figures have a tolerance of ±0.5dB or 5%
ADC Performance
Gain
Input Impedance
THD + Noise
Frequency Response
Usable Dynamic Range
Common Mode Rejection
Resolution
Jitter
Group Delay
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1kHz
0dB FS (+24dBu)
50Ω
Link selectable between +18dBu ≈ 0dB FS and +24dBu ≈ 0dB FS
10kΩ @ +24dBu, 5kΩ @ +18dBu
< 0.0035% from 20Hz to 20kHz, irrespective of sample rate
±0.05dB from 20Hz to 20kHz @ 44.1kHz
±0.05dB from 20Hz to 40kHz @ 96kHz
> 110dB
> 55dB from 20Hz to 20kHz
24bit
< 0.025 UI (700Hz to 100kHz filter, internal sync)
64 samples, irrespective of sample rate