Solid State Logic XLogic Super-Analogue Owner's Manual page 15

Signal processor
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Notes
• The external analogue input is DC coupled and electronically balanced. It will feed the right hand
side of the A to D converter in all of the 'stereo' AES modes – when the ADC card is set to run at
either 176.4kHz mono or 192kHz mono this input can not be used.
• The AES/EBU and SPDIF digital outputs are independant of each other. They are both transformer
isolated.
• The Sync Input is a 75Ω BNC and will accept either TTL wordclock (≈5V pk-pk) or unbalanced 75Ω
AES/EBU (≈1V pk-pk). Conversion from balanced to un-balanced AES/EBU is best achieved with
a third-party in-line transformer. These are widely available – your local Solid State Logic
distributor should be able to supply these. Alternatively, a standard 110Ω balanced feed can be
used, albeit at the expense of increased jitter due to the level/impedance mis-match.
• The 'Lock' indicator shows that the ADC card is locked to the selected sync source. Whilst this also
implies that the correct sample rate has been selected on the DIP switches on the rear of the unit,
it does not necessarily mean that valid AES/EBU data is being produced.
Appendix
Page 13

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