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Hardware Description and Board Operation
3.6 MEMORY
M68EZ328ADS v2.0 provides on-board Flash memory and EDO DRAM, for application
development. They can be enabled or disabled individually by setting the corresponding DIP
ARCHIVED BY FREESCALE SEMICONDUCTOR, INC. 2005
switches.
3.6.1 Memory Map
The default memory map of M68EZ328ADS v2.0 in normal mode is shown in Table 3-5. The
chip select range to all of the memory are software programmable. Users can reconfigure
the memory map for their applications.
Table 3-5. M68VZ328ADS v2.0 Default Memory Map
System Address
$00000000-$007FFFFF
$00800000-$009FFFFF
$00A00000-$00BFFFFF
$00C00000-$00FBFFFF
$FFFC0000-$FFFCFFFF
$FFFD0000-$FFFDFFFF
$FFFFF000-$FFFFFFFF
3.6.2 FLASH Memory
MC68EZ328
M68EZ328ADS v2.0 supports up to two 2M-byte Flash memory chips. However, only one
bank is installed when the board is shipped out from the factory. Figure 3-2. shows the inter-
face of them. They are chip-selected by *CSA0 and *CSA1 signals. The connection of these
*CSAx signals to the Flash memories is controlled by DIP switches S2-1 and S2-2.
3-19
Freescale Semiconductor, Inc.
Memory
8MB EDO DRAM
2MB FLASH BANK0
2MB FLASH BANK1
Unused
EMU Monitor
Debug Port
MC68EZ328 Internal Register
S2-2
CSA1
S2-1
CSA0
A[1..20]
D[0..15]
OE
WE
Figure 3-2. Interface of Flash Memories
M68EZ328ADS v2.0 USER'S MANUAL
For More Information On This Product,
Go to: www.freescale.com
Assigned Chip Select
CSD0
CSA0
CSA1
EMUCS
EMUCS
VCC VCC
1MX16-Bit FLASH
CE
1MX16-Bit FLASH
CE
A[0..19]
D[0..15]
OE
WE
-
-
FLASH1
FLASH0
MOTOROLA
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