8-Bit Parellel Interface Circuit - Epson LQ-860 Technical Manual

8-bit Parallel Inteface Circuit
Figure 2-30 shows the 8-bit parallel interface circuit.
Address mapping. for the E05A24GA (llB) is performed by the CPU via the MMU (8B). The gate array IC
Refer to Appendix A.1.1.7 for the details of the E05A24GA.
l\
CNI \
DATAO–7
STROBE
BUSY
ACKNLG
PE
ERROR
/
AUTOFEEDXT = : = :
ITO ; it become low when INIT signal changes from high to low.
Figures 2-31 and 2-32 show the processing sequence for these signals and the interface signal timing.
Table 2-22 shows the control signals used between the printer and host computer.
+5
RM1O
R65–72
8
+5
R76
J7
r 7RM9
R8"I
4 AA
Figure 2-30, 8-Bit Parellel Interface Circuit
AIC
DINO-7 –
STB
BUSY
ACK
PE
ERR
I
I
2-35
CPU (4B)
r'
I