Address Decoder And Bank Register - Epson ActionPrinter 3000 LQ-200 Service Manual

Address Decoder and Bank Register

This section describes the address decoder and bank register.
Address decoder
The address decoder in gate array E01A05 (6C) outputs a chip select signal to the
internal PROM (3C), 4MCG (5C), 1MCG (2C), RAM (2C), and HEAD gate array
(7A) via address lines AB12 through AB15 and bank lines 7 and 6 in the gate
array.
The chip select for -CS is generated with the -RD signal and the chip select for
the RAM is generated with the -ALE signal.
Bank register
The printer has a bank register in gate array E0lA05 (6C). The bank lines are set
by writing to address F002H and can be checked by reading the same address.
LQ-200/AP3000
Principles of Operation
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