Sony PRS-505/SC - Portable Reader System Service Manual page 41

Pin No. Pin Name
E8 UART1_RXD
E9 UART1_CTS
E10 NAND-CLE
E11 PDOE
E12 PD10
E13 TIN
E14 PCA3PCORE
E15 SRETHER
F1, F2 A20, A19
F3, F4 D28, D27
F5, F6 NVDD1
F7 PCMSCARD
F8 SRUSB20
F9 SSI_TXDAT
F10 SRSRAM1
F11 QVDD3
F12, F13 PD14, PD15
F14 USB_CHRG
F15 SRDSP
G1, G2 A17, A18
G3, G4 D26, D25
G5 NVDD1
G6 VSS
G7 NVDD4
G8 to G10 VSS
G11 PCA3PIO
G12 PCUSB11
G13 RSCINT
G14 MSDET
G15 SRMS
H1 A15
H2 A16
H3 to H5 D22 to D24
H6 to H9 VSS
H10 NVDD2
H11 USB_BOOT
H12 PCR5C
H13 PA14
H14 I2CSDA
H15 TMS
J1, J2 A14, A12
J3, J4 D21, D20
J5 NVDD1
J6, J7 VSS
J8 QVDD1
J9 VSS
J10 SRR5C
J11 I2CSCL
J12 TCK
J13 XTDO
J14, J15 BOOT1, BOOT0
K1 A13
K2 A11
K3 XCS2
K4 D19
I/O
I Serial data input from the sub CPU
O Clear to send signal output to the sub CPU
O Command latch enable signal output to the NAND fl ash mamory
O Output enable signal output to the indicator controller
O Video data output to the indicator controller
I Timer input terminal Not used
O Regulator control signal output terminal
O Not used
O Address signal output to the NOR fl ash memory
I/O Two-way data bus with the SD-RAM
- Power supply terminal (+2.9V)
O Regulator control signal output terminal
O No used
O Audio data output to the audio D/A converter
O Not used
- Power supply terminal (+1.9V)
O Video data output to the indicator controller
O USB charge enable signal output to the sub CPU
O Reset signal output to the audio D/A converter
O Address signal output to the NOR fl ash memory
I/O Two-way data bus with the SD-RAM
- Power supply terminal (+2.9V)
- Ground terminal
- Power supply terminal (+2.9V)
- Ground terminal
O Regulator control signal output terminal
O Not used
I Interrupt request signal input from the memory stick duo/SD memory card controller
Memory stick duo detect signal input from the memory stick duo slot
I
"L": memory stick duo slot in
O Not used
Address signal output to the memory stick duo/SD memory card controller, SD-RAM and
O
NOR fl ash memory
O Address signal output to the NOR fl ash memory
I/O Two-way data bus with the SD-RAM
- Ground terminal
- Power supply terminal (+2.9V)
I Main CPU boot mode control signal input from the sub CPU
Hardware suspend mode output to the memory stick duo/SD memory card controller
O
"L": hardware suspend mode
O Not used
I/O Two-way IIC bus with the temperature sensor
I Test mode select signal input terminal
Address signal output to the memory stick duo/SD memory card controller, SD-RAM and
O
NOR fl ash memory
I/O Two-way data bus with the SD-RAM
- Power supply terminal (+2.9V)
- Ground terminal
- Power supply terminal (+1.9V)
- Ground terminal
O Reset signal output to the memory stick duo/SD memory card controller
O IIC bus serial clock signal output to the temperature sensor
I Test clock signal input terminal
O Test data signal output terminal
I System boot mode select signal input terminal
Address signal output to the memory stick duo/SD memory card controller, SD-RAM and
O
NOR fl ash memory
Address signal output to the memory stick duo/SD memory card controller and NOR fl ash
O
memory
O Chip select signal output to the SD-RAM
I/O Two-way data bus with the SD-RAM
Description
Not used
Not used
Not used
PRS-505
41