Intel D865PERL Specification page 23

Table 3. Specifications (continued)
Reference Specification
Name Title
Information
ATA/
Technology-AT
ATAPI-5
Attachment with Packet
Interface - 5
( ATA/ATAPI-5)
ATX Specification
ATX
ATX/ATX12V Power
ATX12V
Supply Design Guide
Boot Integrity Services
BIS
(BIS) Application
Programming Interface
(API)
Double Data Rate
DDR
(DDR) SDRAM
SDRAM
Specification
Design Specification for
a 184 Pin DDR
Unbuffered DIMM
®
Intel JEDEC DDR
200/266 Unbuffered
DIMM Specification
Addendum
Enhanced Host
EHCI
Controller Interface
Specification for
Universal Serial Bus
IEEE Std 1284.1-1997
EPP
(Enhanced Parallel
Port)
®
Intel Desktop Board D865PERL Specification Update
Version, Revision Date
and Ownership
Revision 3,
February 29, 2000,
Contact: T13 Chair,
Seagate Technology.
Version 2.1,
June 2002,
Intel Corporation.
Version 1.2,
August 2000,
Intel Corporation.
Version 1.0,
August 4, 1999,
Intel Corporation.
Version 2.0,
May 2002,
JEDEC Solid State
Technology Association.
Revision 1.0,
October 2001,
JEDEC Solid State
Technology Association.
Revision 0.9,
September 27, 2001,
Intel Corporation.
Revision 1.0,
March 12, 2002,
Intel Corporation.
Version 1.7, 1997,
Institute of Electrical and
Electronic Engineers.
The information is
available from...
http://www.t13.org/
http://www.formfactors.org/de
veloper/specs/atx/atx2_1.pdf
http://www.formfactors.org/de
veloper/specs/atx/atxspecs.ht
m
http://www.intel.com/labs/ma
nage/wfm/wfmspecs.htm
http://www.jedec.org/
http://www.jedec.org/
http://developer.intel.com/tec
hnology/memory/index.htm
http://developer.intel.com/tec
hnology/usb/download/ehci-
r10.pdf
http://standards.ieee.org/read
ing/ieee/std_public/descriptio
n/busarch/1284.1-
1997_desc.html
continued
17