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2.2
LCD Controller
8
RS
R/W
E
4
DB4–DB7
4
DB0–DB3
2.2.1 Instruction Register (IR)
The IR stores instruction codes such as display clear and cursor shift, and address information of the display
data RAM (DD RAM) and character generator RAM (CG RAM). The IR can be written from the MPU, but not
read.
2.2.2 Data Register (DR)
The DR temporarily stores data to be written into or read from the DD RAM or the CG RAM.
2.2.3 Busy Flag
When the Busy Flag is a "1", the module is in an internal operating mode and ignores any additional instructions
(Refer to Read Busy Flag and Address instruction).
2.2.4 Address Counter (AC)
The AC determines the address of the DD RAM or CG RAM in which new data is stored. After writing into (or
reading from) the DD RAM or CG RAM, the AC is incremented or decremented as defined by the
Increment/Decrement bit (Refer to Entry Mode Set instruction).
2.2.5 Display Data RAM (DD RAM)
The DD RAM contains 80 X 8 bits and represents 80 characters. The relationship between the DD RAM
address and position of the characters in the display can be controlled by the user (Refer to Entry Mode Set and
Cursor or Display Shift instructions).
2.2.6 Character Generator ROM (CG ROM)
The CG ROM generates character patterns of 5 X 7 dots from 8 bit character codes. The 192 5 X 7 dot matrix
Industrial Electronic Engineers, Inc.
Van Nuys, California
7
8
7
8
8
Character
Generator
RAM
(CG RAM)
Busy
Flag
512 Bits
5
Parallel/Serial Data
Conversion Circuit
(Parallel Data –Serial Data)
Figure 2
Address
Timing Generation
Counter (AC)
Circuit
7
Display Data
RAM
(DD RAM)
80x8 bits
8
Character
Generator
ROM
(CG ROM)
7200 Bits
5
LCD Controller Block Diagram
SIZE
CODE IDENT
A
NO.
05464
Scale: NONE
3
16
16
Com1–Com16
40
Seg1–Seg40
40–bit Shift Register
S03875–06–0114
Rev A
Sheet 7
CL1
CL2
M
D
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