Bios; Overview; Supported Acpi States; I 2 C (Inter-Integrated Circuit) - Dell External OEMR R710 Technical Manual

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9 BIOS

9.1 Overview

The R710 BIOS is based on the Dell BIOS core, supporting the following features:
 ® ®
Intel Xeon 5500 and 5600 processor series 2S support

Simultaneous Multi-Threading (SMT) support

Processor Turbo Mode support

PCI 2.3 compliant

Plug and Play 1.0a compliant

MP (Multiprocessor) 1.4 compliant

Ability to boot from hard drive, optical drive, iSCSI drive, USB key, and SD card

ACPI support

Direct Media Interface (DMI) support

PXE and WOL support for on-board NICs

Memory mirroring support

SETUP access through <F2> key at end of POST

USB 2.0 (USB boot code is 1.1 compliant)

F1/F2 error logging in CMOS

Virtual KVM, CD, and floppy support

UEFI 2.1 support

Power management support, including DBS, Power Inventory, and multiple power profiles

Intel TXT (5600 series)

Intel AESNI (5600 series)
The R710 BIOS does not support the following:

BIOS language localization

BIOS recovery after bad flash (can be recovered from iDRAC6 Express)

9.2 Supported ACPI States

The Advanced Configuration and Power Interface is a standard interface for enabling the operating
system to direct configuration and power management.
The Intel Xeon processor 5500 and 5600 series supports the following C-States: C0, C1, C1E, C3, and
C6. The R710 supports all of the available C-States.
2
9.3 I C (Inter-Integrated Circuit)
2
I C is a simple bi-directional two-wire bus for efficient inter-integrated circuit control. All I
compatible devices incorporate an on-chip interface which allows them to communicate directly with
2
each other via the I C bus. This design concept solves the many interfacing problems encountered
when designing digital control circuits. These I
intelligent control devices (e.g., microcontrollers), general-purpose circuits (e.g., LCD drivers,
remote I/O ports, memories) and application-oriented circuits.
The PowerEdge R710 BIOS accesses the I
two multiplexers (MUX) on the ICH9 I

One MUX (U_ICH_SPD) controls the DIMM SPDs through four split segments

The other MUX (U_ICH_MAIN) controls the clock buffers, TOE, and USB Hub through four split
segments.
PowerEdge R710 Technical Guide
2
C devices perform communication functions between
2
C through the ICH9 (Intel I/O Controller Hub 9). There are
2
C bus:
2
C-bus
36