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SOM-SMARC-ADL-N
SOM-SMARC-ASL
SMARC® Rel. 2.1 compliant module with the Intel® Atom
x7000E Series, Intel® Core® i3 and Intel® Processor N Series
(formerly Alder Lake-N and Amston Lake families)

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Table of Contents
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Summarization of Contents

Chapter 1. Introduction
1.1 Warranty and RMA
Details warranty period, RMA request procedure, and conditions for warranty service. Warns against unauthorized modifications.
1.2 Information and Assistance
Provides information on obtaining assistance via SECO website, sales representative, or Help-Desk, including required support details.
1.3 Safety and ESD Precautions
Covers safety precautions for handling the board, low voltage usage, and protection against electrostatic discharge.
1.6 Safety Policy
Details safety requirements for SMARC 2.1 compliant carrier boards and manufacturer responsibilities for end-user products.
1.7 Terminology and Definitions
Provides definitions for technical terms and acronyms used throughout the manual.
1.8 Reference Specifications
Lists applicable industry specifications and reference documents for various technologies.
Chapter 2. Overview
2.1 Introduction
Introduces the SOM-SMARC-ADL-N/ASL products based on Intel SoCs, highlighting performance and power efficiency for IoT and embedded systems.
2.2 Technical Specifications
Details CPU, Memory, Graphics, Video Interfaces, Storage, Networking, USB, Audio, Serial Ports, CAN Bus, and Video Input specifications.
2.3 Electrical Specifications
Covers power supply requirements, power rail meanings, and power consumption measurements for the module.
2.4 Mechanical Specifications
Provides board dimensions, PCB details, and MXM connector accommodation information for physical integration.
2.5 Block Diagram
Presents a visual overview of the module's architecture, showing key components and their interconnections.
Chapter 3. Connectors
3.1 Introduction
States interfaces are available via a single card edge connector and shows module views.
3.2 Connector Descriptions
Describes the SMARC connector and lists effective signals on the card edge connector.
3.2.1.1 LCD Display Support Signals
Details signals for direct panel driving, backlight control, and brightness adjustment via the SOC.
3.2.1.2 eDP / Dual Channel LVDS
Explains the eDP interface or Dual Channel LVDS alternatives, including the eDP to LVDS bridge.
3.2.1.6 SATA Interface Signals
Describes the Gen3 compliant S-ATA interface signals for transmit, receive, and activity status.
3.2.1.11 USB Interface Signals
Details signals for USB 2.0 and Super Speed (USB 3.0/3.1) ports, including power enable and over-current monitoring.
3.2.1.12 PCI Express Interface Signals
Covers signals for PCI Express lanes #0-#3, including receive, transmit, clock, reset, and wake signals.
3.2.1.14 Gigabit Ethernet Signals
Describes signals for NBase-T Ethernet interfaces using Intel I226 Controllers, covering link activity and speed indicators.
Chapter 4. BIOS Setup
4.1 Aptio Setup Utility
Guide to accessing and using the Aptio Setup Utility for BIOS configuration, including key legends and navigation.
4.2 Main Setup Menu
Overview of the Main Setup screen showing BIOS version, processor details, and configuration for Language, Date, and Time.
4.3 Advanced Menu
Details various configuration options for CPU, PCH-FW, Trusted Computing, ACPI, USB, Network, Storage, Display, and Embedded Controller.
4.4 Chipset Menu
Covers PCH-IO and System Agent configurations, including memory, graphics, PCIe, SATA, USB, security, and audio settings.
4.5 Security Menu
Details security settings like passwords, Secure Boot configuration, key management, and trusted computing options.
4.6 Boot Menu
Defines boot order, SATA, NVMe, USB, PS2, Network Stack, Redirection support, and UEFI priorities.
4.7 Save & Exit Menu
Provides options for saving changes, discarding them, resetting, loading defaults, and managing boot managers.
Chapter 5. Appendices
5.1 Thermal Design
Addresses heat management for high-performance modules, emphasizing customer responsibility for cooling solutions.

Table of Contents